Gabe Black a8fbc4ec76 Got hello world to work! ... arch/sparc/isa/decoder.isa: Made sure if a register was assigned to along some control path, then all paths on which no exception would block commit set a value as well. Also, Rs1 is treated as signed for bpr instructions. arch/sparc/isa/formats/integerop.isa: Added an IntOpImm11 class which sign extends the SIMM11 immediate field. arch/sparc/isa/formats/mem.isa: Fixed how offsets are used, and how disassembly is generated. arch/sparc/linux/process.cc: Added fstat and exit_group syscalls. --HG-- extra : convert_revision : 3b4427d239d254a92179a4137441125b8a364264		2006-04-30 01:46:00 -04:00
..
alpha	Add SparcSystem object	2006-04-28 15:34:03 -04:00
mips	Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)	2006-04-28 00:24:25 -04:00
sparc	Got hello world to work!	2006-04-30 01:46:00 -04:00
isa_parser.py	change readPC() + 4 to readNextPC() and the same for NNPC ...	2006-04-27 16:44:12 -04:00
isa_specific.hh	Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu	2006-03-14 18:28:51 -05:00
SConscript	Make .isa-file ##include file paths relative to including file.	2006-03-28 22:29:42 -05:00