Korey Sewell a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version ... SConscript: changed the alpha_memory.hh to memory.hh in SConscript arch/isa_parser.py: temporarily comment out o3 model arch/mips/isa/base.isa: arch/mips/isa_traits.cc: arch/mips/isa_traits.hh: Fix Up Base Class to mirror how Alpha generates StaticInsts arch/mips/faults.cc: MIPS fault.cc file arch/mips/faults.hh: MIPS fault.hh file --HG-- rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b		2006-02-21 22:02:05 -05:00
..
formats	make MIPS specific	2006-02-20 14:48:10 -05:00
base.isa	Renaming alpha files and changing some MIPS stuff to be more like Alpha version	2006-02-21 22:02:05 -05:00
bitfields.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00
decoder.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00
formats.isa	MIPS generates ISA code through scons '.../decoder.cc'!!!	2006-02-18 03:12:04 -05:00
includes.isa	name changes ... minor IntOP format change	2006-02-07 18:36:08 -05:00
main.isa	trying to get ISA to parse correctly ...	2006-02-14 21:26:01 -05:00
operands.isa	load/store instruction format ... now generates load/store code	2006-02-20 14:30:23 -05:00