gem5/src/gpu-compute
Tony Gutierrez a0d4019abd gpu-compute: init valid field of GpuTlbEntry in default ctor
valid field for GpuTlbEntry is not set in the default ctor, which can
lead to strange behavior, and is also flagged by UBSAN.
2016-11-21 15:38:30 -05:00
..
brig_object.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
brig_object.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
cl_driver.cc gpu-compute, hsail: make the PC a byte address, not an instruction index 2016-10-26 22:47:43 -04:00
cl_driver.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
cl_event.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
compute_unit.cc gpu-compute: support in-order data delivery in GM pipe 2016-10-26 22:48:28 -04:00
compute_unit.hh gpu-compute: use System cache line size in the GPU 2016-10-26 22:47:47 -04:00
condition_register_state.cc gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() 2016-10-26 22:47:49 -04:00
condition_register_state.hh gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() 2016-10-26 22:47:49 -04:00
dispatcher.cc gpu-compute: fix typo in GPUDispatcher 2016-09-16 14:47:19 -04:00
dispatcher.hh gpu-compute: Adding ioctl for HW context size 2016-09-16 12:27:56 -04:00
exec_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
exec_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
fetch_unit.cc gpu-compute: use System cache line size in the GPU 2016-10-26 22:47:47 -04:00
fetch_unit.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
global_memory_pipeline.cc gpu-compute: support in-order data delivery in GM pipe 2016-10-26 22:48:28 -04:00
global_memory_pipeline.hh gpu-compute: support in-order data delivery in GM pipe 2016-10-26 22:48:28 -04:00
GPU.py gpu-compute: support in-order data delivery in GM pipe 2016-10-26 22:48:28 -04:00
gpu_dyn_inst.cc gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() 2016-10-26 22:47:49 -04:00
gpu_dyn_inst.hh gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() 2016-10-26 22:47:49 -04:00
gpu_exec_context.cc gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
gpu_exec_context.hh gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
gpu_static_inst.cc gpu-compute, hsail: make the PC a byte address, not an instruction index 2016-10-26 22:47:43 -04:00
gpu_static_inst.hh hsail,gpu-compute: fixes to appease clang++ 2016-10-26 22:48:45 -04:00
gpu_tlb.cc hsail,gpu-compute: fixes to appease clang++ 2016-10-26 22:48:45 -04:00
gpu_tlb.hh gpu-compute: init valid field of GpuTlbEntry in default ctor 2016-11-21 15:38:30 -05:00
GPUStaticInstFlags.py gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
hsa_code.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
hsa_kernel_info.hh gpu-compute: Adding ioctl for HW context size 2016-09-16 12:27:56 -04:00
hsa_object.cc gpu-compute: remove brig_object.hh from hsa_object.cc 2016-02-17 11:46:02 -05:00
hsa_object.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
hsail_code.cc gpu-compute, hsail: make the PC a byte address, not an instruction index 2016-10-26 22:47:43 -04:00
hsail_code.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
kernel_cfg.cc gpu-compute, hsail: make the PC a byte address, not an instruction index 2016-10-26 22:47:43 -04:00
kernel_cfg.hh gpu-compute, hsail: make the PC a byte address, not an instruction index 2016-10-26 22:47:43 -04:00
lds_state.cc gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
lds_state.hh gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
LdsState.py gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
local_memory_pipeline.cc hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
local_memory_pipeline.hh hsail, gpu-compute: remove doGm/SmReturn add completeAcc 2016-10-26 22:47:19 -04:00
misc.hh gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
ndrange.hh mem: Remove threadId from memory request class 2016-04-07 09:30:20 -05:00
of_scheduling_policy.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
of_scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
pool_manager.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
pool_manager.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
qstruct.hh gpu-compute: Remove WFContext 2016-09-16 12:26:03 -04:00
rr_scheduling_policy.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
rr_scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
schedule_stage.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
schedule_stage.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduler.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduler.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
scheduling_policy.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
SConscript gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
scoreboard_check_stage.cc gpu-compute: remove unused variable from scoreboard check stage 2016-03-21 11:26:23 -04:00
scoreboard_check_stage.hh gpu-compute: remove unused variable from scoreboard check stage 2016-03-21 11:26:23 -04:00
shader.cc gpu-compute: use System cache line size in the GPU 2016-10-26 22:47:47 -04:00
shader.hh gpu-compute: remove inst enums and use bit flag for attributes 2016-10-26 22:47:11 -04:00
simple_pool_manager.cc gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
simple_pool_manager.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
tlb_coalescer.cc stats: Fixing regStats function for some SimObjects 2016-06-06 17:16:43 +01:00
tlb_coalescer.hh gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
vector_register_file.cc gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() 2016-10-26 22:47:49 -04:00
vector_register_file.hh gpu-compute: Adding vector register file debug messages 2016-09-16 12:30:05 -04:00
vector_register_state.cc gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
vector_register_state.hh gpu-compute: parametrize Wavefront size 2016-06-09 11:24:55 -04:00
wavefront.cc gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
wavefront.hh gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00
X86GPUTLB.py gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00