gem5/src/arch
Ali Saidi 9d04510869 bug fixes to get us to 145m instructions
src/arch/sparc/intregfile.cc:
    some checks to make sure that the cwp and global register flattening stuff is working. These things have caught a couple of bugs so I think it would be good to keep them around at least for now
src/arch/sparc/isa/decoder.isa:
    fix smul instruction to write Y correctly
src/arch/sparc/miscregfile.cc:
    legion always returns du and dl set, so we need to emulate that for now at least

--HG--
extra : convert_revision : 82f9276340888f1e43071c69504486efdcfdb3a8
2007-01-10 22:19:13 -05:00
..
alpha Merge zizzer:/bk/sparcfs 2006-12-15 13:27:53 -05:00
mips Merge zizzer:/bk/sparcfs 2006-12-15 13:27:53 -05:00
sparc bug fixes to get us to 145m instructions 2007-01-10 22:19:13 -05:00
isa_parser.py Merge zizzer:/bk/newmem 2006-12-12 21:19:51 -05:00
isa_specific.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
SConscript Add support for mmapped iprs to atomic cpu 2006-11-29 17:11:10 -05:00