gem5/configs/example
Joel Hestness 90dd745ff6 se.py Ruby: Connect TLB walker ports
In order to ensure correct functionality of switch CPUs, the TLB walker ports
must be connected to the Ruby system in x86 simulation.

This fixes x86 assertion failures that the TLB walker ports are not connected
during the CPU switch process.
2012-09-12 21:42:57 -05:00
..
fs.py Bridge: Remove NACKs in the bridge and unify with packet queue 2012-08-22 11:39:58 -04:00
memtest.py Mem: Make SimpleMemory single ported 2012-07-12 12:56:13 -04:00
ruby_direct_test.py ruby: changes how Topologies are created 2012-07-10 22:51:53 -07:00
ruby_fs.py ruby: changes how Topologies are created 2012-07-10 22:51:53 -07:00
ruby_mem_test.py Mem: Make SimpleMemory single ported 2012-07-12 12:56:13 -04:00
ruby_network_test.py ruby: changes how Topologies are created 2012-07-10 22:51:53 -07:00
ruby_random_test.py ruby: remove the cpu assumptions for the random tester 2012-07-10 22:51:54 -07:00
se.py se.py Ruby: Connect TLB walker ports 2012-09-12 21:42:57 -05:00