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gem5/tests/configs
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Nilay Vaish c4e7e18eeb ruby: add option for number of transitions per cycle 
The number of transitions per cycle that a controller can carry out is
a proxy for the number of ports that a controller has. This value is
currently 32 which is way too high. The patch introduces an option
for the number of ports and uses this option in the protocol files
to set the number of transitions. The default value is being set to
4. None of the se regressions change. Ruby stats for the fs regression
change and are being updated.
2013-08-20 11:32:31 -05:00
..
alpha_generic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
arm_generic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
base_config.py mem: Change AbstractMemory defaults to match the common case 2013-08-19 03:52:33 -04:00
inorder-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
memtest-ruby.py ruby: add option for number of transitions per cycle 2013-08-20 11:32:31 -05:00
memtest.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
o3-timing-checker.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
o3-timing-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
o3-timing-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
o3-timing-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
o3-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
pc-o3-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
pc-simple-atomic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
pc-simple-timing-ruby.py mem: Change AbstractMemory defaults to match the common case 2013-08-19 03:52:33 -04:00
pc-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
pc-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3-checker.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-atomic-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-atomic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-timing-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-atomic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
rubytest-ruby.py ruby: add option for number of transitions per cycle 2013-08-20 11:32:31 -05:00
simple-atomic-dummychecker.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-atomic-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
simple-atomic-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-atomic.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-timing-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
simple-timing-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-timing-ruby.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
simple-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
switcheroo.py config: Move CPU handover logic to m5.switchCpus() 2013-02-15 17:40:08 -05:00
t1000-simple-atomic.py mem: Change AbstractMemory defaults to match the common case 2013-08-19 03:52:33 -04:00
tgen-simple-dram.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
tgen-simple-mem.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
tsunami-inorder.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-o3-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-atomic-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-atomic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-timing-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
twosys-tsunami-simple-atomic.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
x86_generic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00