3464 lines
480 KiB
Text
3464 lines
480 KiB
Text
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---------- Begin Simulation Statistics ----------
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sim_seconds 0.000667 # Number of seconds simulated
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sim_ticks 667407500 # Number of ticks simulated
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final_tick 667407500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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sim_freq 1000000000000 # Frequency of simulated ticks
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host_inst_rate 72185 # Simulator instruction rate (inst/s)
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host_op_rate 148440 # Simulator op (including micro ops) rate (op/s)
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host_tick_rate 719412350 # Simulator tick rate (ticks/s)
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host_mem_usage 1308600 # Number of bytes of host memory used
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host_seconds 0.93 # Real time elapsed on the host
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sim_insts 66963 # Number of instructions simulated
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sim_ops 137705 # Number of ops (including micro ops) simulated
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system.voltage_domain.voltage 1 # Voltage in Volts
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system.clk_domain.clock 1000 # Clock period in ticks
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system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
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system.mem_ctrls.bytes_read::dir_cntrl0 99136 # Number of bytes read from this memory
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system.mem_ctrls.bytes_read::total 99136 # Number of bytes read from this memory
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system.mem_ctrls.num_reads::dir_cntrl0 1549 # Number of read requests responded to by this memory
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system.mem_ctrls.num_reads::total 1549 # Number of read requests responded to by this memory
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system.mem_ctrls.bw_read::dir_cntrl0 148538936 # Total read bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_read::total 148538936 # Total read bandwidth from this memory (bytes/s)
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system.mem_ctrls.bw_total::dir_cntrl0 148538936 # Total bandwidth to/from this memory (bytes/s)
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system.mem_ctrls.bw_total::total 148538936 # Total bandwidth to/from this memory (bytes/s)
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system.mem_ctrls.readReqs 1549 # Number of read requests accepted
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system.mem_ctrls.writeReqs 0 # Number of write requests accepted
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system.mem_ctrls.readBursts 1549 # Number of DRAM read bursts, including those serviced by the write queue
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system.mem_ctrls.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue
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system.mem_ctrls.bytesReadDRAM 99136 # Total number of bytes read from DRAM
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system.mem_ctrls.bytesReadWrQ 0 # Total number of bytes read from write queue
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system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM
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system.mem_ctrls.bytesReadSys 99136 # Total read bytes from the system interface side
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system.mem_ctrls.bytesWrittenSys 0 # Total written bytes from the system interface side
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system.mem_ctrls.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue
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system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
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system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
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system.mem_ctrls.perBankRdBursts::0 122 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::1 192 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::2 91 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::3 44 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::4 61 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::5 79 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::6 52 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::7 42 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::8 54 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::9 56 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::10 174 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::11 90 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::12 222 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::13 125 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::14 51 # Per bank write bursts
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system.mem_ctrls.perBankRdBursts::15 94 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts
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system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts
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system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
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system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
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system.mem_ctrls.totGap 667174000 # Total gap between requests
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system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
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system.mem_ctrls.readPktSize::6 1549 # Read request sizes (log2)
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system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
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system.mem_ctrls.writePktSize::6 0 # Write request sizes (log2)
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system.mem_ctrls.rdQLenPdf::0 1540 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::1 2 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::2 1 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::3 1 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::4 2 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::5 1 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::6 1 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::7 1 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
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system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::0 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::1 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::2 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::3 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::4 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::5 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::6 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::7 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::8 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
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system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
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system.mem_ctrls.bytesPerActivate::samples 484 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::mean 203.371901 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::gmean 144.930715 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::stdev 194.713066 # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::0-127 177 36.57% 36.57% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::128-255 168 34.71% 71.28% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::256-383 63 13.02% 84.30% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::384-511 29 5.99% 90.29% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::512-639 19 3.93% 94.21% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::640-767 11 2.27% 96.49% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::768-895 10 2.07% 98.55% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::896-1023 2 0.41% 98.97% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::1024-1151 5 1.03% 100.00% # Bytes accessed per row activation
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system.mem_ctrls.bytesPerActivate::total 484 # Bytes accessed per row activation
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system.mem_ctrls.totQLat 31625750 # Total ticks spent queuing
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system.mem_ctrls.totMemAccLat 60669500 # Total ticks spent from burst creation until serviced by the DRAM
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system.mem_ctrls.totBusLat 7745000 # Total ticks spent in databus transfers
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system.mem_ctrls.avgQLat 20416.88 # Average queueing delay per DRAM burst
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system.mem_ctrls.avgBusLat 5000.00 # Average bus latency per DRAM burst
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system.mem_ctrls.avgMemAccLat 39166.88 # Average memory access latency per DRAM burst
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system.mem_ctrls.avgRdBW 148.54 # Average DRAM read bandwidth in MiByte/s
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system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
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system.mem_ctrls.avgRdBWSys 148.54 # Average system read bandwidth in MiByte/s
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system.mem_ctrls.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
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system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
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system.mem_ctrls.busUtil 1.16 # Data bus utilization in percentage
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system.mem_ctrls.busUtilRead 1.16 # Data bus utilization in percentage for reads
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system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes
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system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
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system.mem_ctrls.avgWrQLen 0.00 # Average write queue length when enqueuing
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system.mem_ctrls.readRowHits 1060 # Number of row buffer hits during reads
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system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes
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system.mem_ctrls.readRowHitRate 68.43 # Row buffer hit rate for reads
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system.mem_ctrls.writeRowHitRate nan # Row buffer hit rate for writes
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system.mem_ctrls.avgGap 430712.72 # Average gap between requests
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system.mem_ctrls.pageHitRate 68.43 # Row buffer hit rate, read and write combined
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system.mem_ctrls_0.actEnergy 1320900 # Energy for activate commands per rank (pJ)
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system.mem_ctrls_0.preEnergy 694485 # Energy for precharge commands per rank (pJ)
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system.mem_ctrls_0.readEnergy 4876620 # Energy for read commands per rank (pJ)
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system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ)
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system.mem_ctrls_0.refreshEnergy 51629760.000000 # Energy for refresh commands per rank (pJ)
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system.mem_ctrls_0.actBackEnergy 18588840 # Energy for active background per rank (pJ)
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system.mem_ctrls_0.preBackEnergy 1670400 # Energy for precharge background per rank (pJ)
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system.mem_ctrls_0.actPowerDownEnergy 210561990 # Energy for active power-down per rank (pJ)
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system.mem_ctrls_0.prePowerDownEnergy 42231360 # Energy for precharge power-down per rank (pJ)
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system.mem_ctrls_0.selfRefreshEnergy 15446940 # Energy for self refresh per rank (pJ)
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system.mem_ctrls_0.totalEnergy 347021295 # Total energy per rank (pJ)
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system.mem_ctrls_0.averagePower 519.954143 # Core power per rank (mW)
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system.mem_ctrls_0.totalIdleTime 622134250 # Total Idle time Per DRAM Rank
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system.mem_ctrls_0.memoryStateTime::IDLE 2030000 # Time in different power states
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system.mem_ctrls_0.memoryStateTime::REF 21876000 # Time in different power states
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system.mem_ctrls_0.memoryStateTime::SREF 50557000 # Time in different power states
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system.mem_ctrls_0.memoryStateTime::PRE_PDN 109975750 # Time in different power states
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system.mem_ctrls_0.memoryStateTime::ACT 21192250 # Time in different power states
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system.mem_ctrls_0.memoryStateTime::ACT_PDN 461776500 # Time in different power states
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system.mem_ctrls_1.actEnergy 2170560 # Energy for activate commands per rank (pJ)
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system.mem_ctrls_1.preEnergy 1142295 # Energy for precharge commands per rank (pJ)
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system.mem_ctrls_1.readEnergy 6183240 # Energy for read commands per rank (pJ)
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system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ)
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system.mem_ctrls_1.refreshEnergy 52244400.000000 # Energy for refresh commands per rank (pJ)
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system.mem_ctrls_1.actBackEnergy 21584190 # Energy for active background per rank (pJ)
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system.mem_ctrls_1.preBackEnergy 1299360 # Energy for precharge background per rank (pJ)
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system.mem_ctrls_1.actPowerDownEnergy 243510840 # Energy for active power-down per rank (pJ)
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system.mem_ctrls_1.prePowerDownEnergy 28002720 # Energy for precharge power-down per rank (pJ)
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system.mem_ctrls_1.selfRefreshEnergy 2892540 # Energy for self refresh per rank (pJ)
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system.mem_ctrls_1.totalEnergy 359030145 # Total energy per rank (pJ)
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system.mem_ctrls_1.averagePower 537.947423 # Core power per rank (mW)
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system.mem_ctrls_1.totalIdleTime 616133750 # Total Idle time Per DRAM Rank
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system.mem_ctrls_1.memoryStateTime::IDLE 980000 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::REF 22106000 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::SREF 9751250 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::PRE_PDN 72913500 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::ACT 27618000 # Time in different power states
|
|
system.mem_ctrls_1.memoryStateTime::ACT_PDN 534038750 # Time in different power states
|
|
system.ruby.clk_domain.clock 500 # Clock period in ticks
|
|
system.ruby.phys_mem.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.phys_mem.bytes_read::cpu0.inst 696760 # Number of bytes read from this memory
|
|
system.ruby.phys_mem.bytes_read::cpu0.data 119832 # Number of bytes read from this memory
|
|
system.ruby.phys_mem.bytes_read::cpu1.CUs0.ComputeUnit 2856 # Number of bytes read from this memory
|
|
system.ruby.phys_mem.bytes_read::cpu1.CUs1.ComputeUnit 2856 # Number of bytes read from this memory
|
|
system.ruby.phys_mem.bytes_read::total 822304 # Number of bytes read from this memory
|
|
system.ruby.phys_mem.bytes_inst_read::cpu0.inst 696760 # Number of instructions bytes read from this memory
|
|
system.ruby.phys_mem.bytes_inst_read::cpu1.CUs0.ComputeUnit 1576 # Number of instructions bytes read from this memory
|
|
system.ruby.phys_mem.bytes_inst_read::cpu1.CUs1.ComputeUnit 1576 # Number of instructions bytes read from this memory
|
|
system.ruby.phys_mem.bytes_inst_read::total 699912 # Number of instructions bytes read from this memory
|
|
system.ruby.phys_mem.bytes_written::cpu0.data 72767 # Number of bytes written to this memory
|
|
system.ruby.phys_mem.bytes_written::cpu1.CUs0.ComputeUnit 256 # Number of bytes written to this memory
|
|
system.ruby.phys_mem.bytes_written::cpu1.CUs1.ComputeUnit 256 # Number of bytes written to this memory
|
|
system.ruby.phys_mem.bytes_written::total 73279 # Number of bytes written to this memory
|
|
system.ruby.phys_mem.num_reads::cpu0.inst 87095 # Number of read requests responded to by this memory
|
|
system.ruby.phys_mem.num_reads::cpu0.data 16686 # Number of read requests responded to by this memory
|
|
system.ruby.phys_mem.num_reads::cpu1.CUs0.ComputeUnit 547 # Number of read requests responded to by this memory
|
|
system.ruby.phys_mem.num_reads::cpu1.CUs1.ComputeUnit 547 # Number of read requests responded to by this memory
|
|
system.ruby.phys_mem.num_reads::total 104875 # Number of read requests responded to by this memory
|
|
system.ruby.phys_mem.num_writes::cpu0.data 10422 # Number of write requests responded to by this memory
|
|
system.ruby.phys_mem.num_writes::cpu1.CUs0.ComputeUnit 256 # Number of write requests responded to by this memory
|
|
system.ruby.phys_mem.num_writes::cpu1.CUs1.ComputeUnit 256 # Number of write requests responded to by this memory
|
|
system.ruby.phys_mem.num_writes::total 10934 # Number of write requests responded to by this memory
|
|
system.ruby.phys_mem.bw_read::cpu0.inst 1043979877 # Total read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_read::cpu0.data 179548477 # Total read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_read::cpu1.CUs0.ComputeUnit 4279245 # Total read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_read::cpu1.CUs1.ComputeUnit 4279245 # Total read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_read::total 1232086843 # Total read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_inst_read::cpu0.inst 1043979877 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_inst_read::cpu1.CUs0.ComputeUnit 2361376 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_inst_read::cpu1.CUs1.ComputeUnit 2361376 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_inst_read::total 1048702629 # Instruction read bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_write::cpu0.data 109029341 # Write bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_write::cpu1.CUs0.ComputeUnit 383574 # Write bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_write::cpu1.CUs1.ComputeUnit 383574 # Write bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_write::total 109796489 # Write bandwidth from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_total::cpu0.inst 1043979877 # Total bandwidth to/from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_total::cpu0.data 288577818 # Total bandwidth to/from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_total::cpu1.CUs0.ComputeUnit 4662818 # Total bandwidth to/from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_total::cpu1.CUs1.ComputeUnit 4662818 # Total bandwidth to/from this memory (bytes/s)
|
|
system.ruby.phys_mem.bw_total::total 1341883332 # Total bandwidth to/from this memory (bytes/s)
|
|
system.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.outstanding_req_hist_seqr::bucket_size 1
|
|
system.ruby.outstanding_req_hist_seqr::max_bucket 9
|
|
system.ruby.outstanding_req_hist_seqr::samples 114203
|
|
system.ruby.outstanding_req_hist_seqr::mean 1.000035
|
|
system.ruby.outstanding_req_hist_seqr::gmean 1.000024
|
|
system.ruby.outstanding_req_hist_seqr::stdev 0.005918
|
|
system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 114199 100.00% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.outstanding_req_hist_seqr::total 114203
|
|
system.ruby.outstanding_req_hist_coalsr::bucket_size 1
|
|
system.ruby.outstanding_req_hist_coalsr::max_bucket 9
|
|
system.ruby.outstanding_req_hist_coalsr::samples 27
|
|
system.ruby.outstanding_req_hist_coalsr::mean 2.074074
|
|
system.ruby.outstanding_req_hist_coalsr::gmean 1.820631
|
|
system.ruby.outstanding_req_hist_coalsr::stdev 1.071517
|
|
system.ruby.outstanding_req_hist_coalsr | 0 0.00% 0.00% | 10 37.04% 37.04% | 9 33.33% 70.37% | 4 14.81% 85.19% | 4 14.81% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.outstanding_req_hist_coalsr::total 27
|
|
system.ruby.latency_hist_seqr::bucket_size 64
|
|
system.ruby.latency_hist_seqr::max_bucket 639
|
|
system.ruby.latency_hist_seqr::samples 114203
|
|
system.ruby.latency_hist_seqr::mean 4.823332
|
|
system.ruby.latency_hist_seqr::gmean 2.131609
|
|
system.ruby.latency_hist_seqr::stdev 24.449444
|
|
system.ruby.latency_hist_seqr | 112668 98.66% 98.66% | 0 0.00% 98.66% | 0 0.00% 98.66% | 1490 1.30% 99.96% | 18 0.02% 99.98% | 18 0.02% 99.99% | 2 0.00% 99.99% | 0 0.00% 99.99% | 0 0.00% 99.99% | 7 0.01% 100.00%
|
|
system.ruby.latency_hist_seqr::total 114203
|
|
system.ruby.latency_hist_coalsr::bucket_size 64
|
|
system.ruby.latency_hist_coalsr::max_bucket 639
|
|
system.ruby.latency_hist_coalsr::samples 27
|
|
system.ruby.latency_hist_coalsr::mean 175.777778
|
|
system.ruby.latency_hist_coalsr::gmean 29.086037
|
|
system.ruby.latency_hist_coalsr::stdev 175.084668
|
|
system.ruby.latency_hist_coalsr | 13 48.15% 48.15% | 0 0.00% 48.15% | 0 0.00% 48.15% | 1 3.70% 51.85% | 2 7.41% 59.26% | 7 25.93% 85.19% | 4 14.81% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.latency_hist_coalsr::total 27
|
|
system.ruby.hit_latency_hist_seqr::bucket_size 64
|
|
system.ruby.hit_latency_hist_seqr::max_bucket 639
|
|
system.ruby.hit_latency_hist_seqr::samples 1535
|
|
system.ruby.hit_latency_hist_seqr::mean 211.362215
|
|
system.ruby.hit_latency_hist_seqr::gmean 209.793806
|
|
system.ruby.hit_latency_hist_seqr::stdev 34.965177
|
|
system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1490 97.07% 97.07% | 18 1.17% 98.24% | 18 1.17% 99.41% | 2 0.13% 99.54% | 0 0.00% 99.54% | 0 0.00% 99.54% | 7 0.46% 100.00%
|
|
system.ruby.hit_latency_hist_seqr::total 1535
|
|
system.ruby.miss_latency_hist_seqr::bucket_size 4
|
|
system.ruby.miss_latency_hist_seqr::max_bucket 39
|
|
system.ruby.miss_latency_hist_seqr::samples 112668
|
|
system.ruby.miss_latency_hist_seqr::mean 2.009426
|
|
system.ruby.miss_latency_hist_seqr::gmean 2.002413
|
|
system.ruby.miss_latency_hist_seqr::stdev 0.411800
|
|
system.ruby.miss_latency_hist_seqr | 112609 99.95% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 59 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.miss_latency_hist_seqr::total 112668
|
|
system.ruby.miss_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.miss_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.miss_latency_hist_coalsr::samples 27
|
|
system.ruby.miss_latency_hist_coalsr::mean 175.777778
|
|
system.ruby.miss_latency_hist_coalsr::gmean 29.086037
|
|
system.ruby.miss_latency_hist_coalsr::stdev 175.084668
|
|
system.ruby.miss_latency_hist_coalsr | 13 48.15% 48.15% | 0 0.00% 48.15% | 0 0.00% 48.15% | 1 3.70% 51.85% | 2 7.41% 59.26% | 7 25.93% 85.19% | 4 14.81% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.miss_latency_hist_coalsr::total 27
|
|
system.ruby.L1Cache.incomplete_times_seqr 112609
|
|
system.ruby.L2Cache.incomplete_times_seqr 59
|
|
system.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits
|
|
system.cp_cntrl0.L1D0cache.demand_misses 506 # Number of cache demand misses
|
|
system.cp_cntrl0.L1D0cache.demand_accesses 506 # Number of cache demand accesses
|
|
system.cp_cntrl0.L1D0cache.num_data_array_reads 16155 # number of data array reads
|
|
system.cp_cntrl0.L1D0cache.num_data_array_writes 11985 # number of data array writes
|
|
system.cp_cntrl0.L1D0cache.num_tag_array_reads 27132 # number of tag array reads
|
|
system.cp_cntrl0.L1D0cache.num_tag_array_writes 1584 # number of tag array writes
|
|
system.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits
|
|
system.cp_cntrl0.L1D1cache.demand_misses 0 # Number of cache demand misses
|
|
system.cp_cntrl0.L1D1cache.demand_accesses 0 # Number of cache demand accesses
|
|
system.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits
|
|
system.cp_cntrl0.L1Icache.demand_misses 1088 # Number of cache demand misses
|
|
system.cp_cntrl0.L1Icache.demand_accesses 1088 # Number of cache demand accesses
|
|
system.cp_cntrl0.L1Icache.num_data_array_reads 86007 # number of data array reads
|
|
system.cp_cntrl0.L1Icache.num_data_array_writes 54 # number of data array writes
|
|
system.cp_cntrl0.L1Icache.num_tag_array_reads 87684 # number of tag array reads
|
|
system.cp_cntrl0.L1Icache.num_tag_array_writes 54 # number of tag array writes
|
|
system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
|
|
system.cp_cntrl0.L2cache.demand_misses 1535 # Number of cache demand misses
|
|
system.cp_cntrl0.L2cache.demand_accesses 1535 # Number of cache demand accesses
|
|
system.cp_cntrl0.L2cache.num_data_array_reads 120 # number of data array reads
|
|
system.cp_cntrl0.L2cache.num_data_array_writes 11982 # number of data array writes
|
|
system.cp_cntrl0.L2cache.num_tag_array_reads 12057 # number of tag array reads
|
|
system.cp_cntrl0.L2cache.num_tag_array_writes 1649 # number of tag array writes
|
|
system.cp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cp_cntrl0.sequencer1.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cp_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.clk_domain.clock 500 # Clock period in ticks
|
|
system.cpu0.dtb.walker.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks
|
|
system.cpu0.interrupts.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.itb.walker.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.workload.num_syscalls 21 # Number of system calls
|
|
system.cpu0.numPwrStateTransitions 2 # Number of power state transitions
|
|
system.cpu0.pwrStateClkGateDist::samples 1 # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateClkGateDist::mean 2095501 # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateClkGateDist::1000-5e+10 1 100.00% 100.00% # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateClkGateDist::min_value 2095501 # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateClkGateDist::max_value 2095501 # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateClkGateDist::total 1 # Distribution of time spent in the clock gated state
|
|
system.cpu0.pwrStateResidencyTicks::ON 665311999 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.pwrStateResidencyTicks::CLK_GATED 2095501 # Cumulative time (in ticks) in various power states
|
|
system.cpu0.numCycles 1334815 # number of cpu cycles simulated
|
|
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
|
|
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
|
|
system.cpu0.committedInsts 66963 # Number of instructions committed
|
|
system.cpu0.committedOps 137705 # Number of ops (including micro ops) committed
|
|
system.cpu0.num_int_alu_accesses 136380 # Number of integer alu accesses
|
|
system.cpu0.num_fp_alu_accesses 1279 # Number of float alu accesses
|
|
system.cpu0.num_func_calls 3196 # number of times a function call or return occured
|
|
system.cpu0.num_conditional_control_insts 12151 # number of instructions that are conditional controls
|
|
system.cpu0.num_int_insts 136380 # number of integer instructions
|
|
system.cpu0.num_fp_insts 1279 # number of float instructions
|
|
system.cpu0.num_int_register_reads 257490 # number of times the integer registers were read
|
|
system.cpu0.num_int_register_writes 110039 # number of times the integer registers were written
|
|
system.cpu0.num_fp_register_reads 1981 # number of times the floating registers were read
|
|
system.cpu0.num_fp_register_writes 981 # number of times the floating registers were written
|
|
system.cpu0.num_cc_register_reads 78262 # number of times the CC registers were read
|
|
system.cpu0.num_cc_register_writes 42183 # number of times the CC registers were written
|
|
system.cpu0.num_mem_refs 27198 # number of memory refs
|
|
system.cpu0.num_load_insts 16684 # Number of load instructions
|
|
system.cpu0.num_store_insts 10514 # Number of store instructions
|
|
system.cpu0.num_idle_cycles 4191.003994 # Number of idle cycles
|
|
system.cpu0.num_busy_cycles 1330623.996006 # Number of busy cycles
|
|
system.cpu0.not_idle_fraction 0.996860 # Percentage of non-idle cycles
|
|
system.cpu0.idle_fraction 0.003140 # Percentage of idle cycles
|
|
system.cpu0.Branches 16199 # Number of branches fetched
|
|
system.cpu0.op_class::No_OpClass 615 0.45% 0.45% # Class of executed instruction
|
|
system.cpu0.op_class::IntAlu 108791 79.00% 79.45% # Class of executed instruction
|
|
system.cpu0.op_class::IntMult 13 0.01% 79.46% # Class of executed instruction
|
|
system.cpu0.op_class::IntDiv 138 0.10% 79.56% # Class of executed instruction
|
|
system.cpu0.op_class::FloatAdd 950 0.69% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatCmp 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatCvt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatMult 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatMultAcc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatDiv 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatMisc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::FloatSqrt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdAdd 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdAddAcc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdAlu 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdCmp 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdCvt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdMisc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdMult 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdMultAcc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdShift 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdShiftAcc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdSqrt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatAdd 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatAlu 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatCmp 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatCvt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatDiv 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatMisc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatMult 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::SimdFloatSqrt 0 0.00% 80.25% # Class of executed instruction
|
|
system.cpu0.op_class::MemRead 16382 11.90% 92.15% # Class of executed instruction
|
|
system.cpu0.op_class::MemWrite 10514 7.64% 99.78% # Class of executed instruction
|
|
system.cpu0.op_class::FloatMemRead 302 0.22% 100.00% # Class of executed instruction
|
|
system.cpu0.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
|
|
system.cpu0.op_class::total 137705 # Class of executed instruction
|
|
system.cpu1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.cpu1.clk_domain.clock 1000 # Clock period in ticks
|
|
system.cpu1.CUs0.localDataStore.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu1.CUs0.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts00.timesBlockedDueRAWDependencies 309 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts08.timesBlockedDueRAWDependencies 284 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts16.timesBlockedDueRAWDependencies 279 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts24.timesBlockedDueRAWDependencies 274 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs0.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs0.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::samples 35 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::mean 11.257143 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::stdev 5.595917 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::2 4 11.43% 11.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::3 4 11.43% 22.86% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::4 1 2.86% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::5 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::6 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::7 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::8 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::9 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::10 4 11.43% 37.14% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::11 4 11.43% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::12 0 0.00% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::13 0 0.00% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::14 1 2.86% 51.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::15 0 0.00% 51.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::16 17 48.57% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::max_value 16 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::total 35 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_no_issue 2741 # number of cycles the CU issues nothing
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_issued 99 # number of cycles the CU issued at least one instruction
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 625 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 340 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 338 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 335 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::GM 404 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::LM 22 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs0.ExecStage.spc::samples 2840 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::mean 0.049648 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::stdev 0.277106 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::0 2741 96.51% 96.51% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::1 57 2.01% 98.52% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::2 42 1.48% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::3 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::max_value 2 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.spc::total 2840 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs0.ExecStage.num_transitions_active_to_idle 90 # number of CU transitions from active to idle
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::samples 90 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::mean 29.322222 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::stdev 145.995831 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::0-4 76 84.44% 84.44% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::5-9 7 7.78% 92.22% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 92.22% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::15-19 0 0.00% 92.22% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::20-24 0 0.00% 92.22% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::25-29 1 1.11% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::75 0 0.00% 93.33% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::overflows 6 6.67% 100.00% # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::max_value 1291 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::total 90 # duration of idle periods in cycles
|
|
system.cpu1.CUs0.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF
|
|
system.cpu1.CUs0.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF
|
|
system.cpu1.CUs0.valu_insts 68 # Number of vector ALU insts issued.
|
|
system.cpu1.CUs0.valu_insts_per_wf 17 # The avg. number of vector ALU insts issued per-wavefront.
|
|
system.cpu1.CUs0.salu_insts 0 # Number of scalar ALU insts issued.
|
|
system.cpu1.CUs0.salu_insts_per_wf 0 # The avg. number of scalar ALU insts issued per-wavefront.
|
|
system.cpu1.CUs0.inst_cycles_valu 68 # Number of cycles needed to execute VALU insts.
|
|
system.cpu1.CUs0.inst_cycles_salu 0 # Number of cycles needed to execute SALU insts.
|
|
system.cpu1.CUs0.thread_cycles_valu 3076 # Number of thread cycles used to execute vector ALU ops. Similar to instCyclesVALU but multiplied by the number of active threads.
|
|
system.cpu1.CUs0.valu_utilization 70.680147 # Percentage of active vector ALU threads in a wave.
|
|
system.cpu1.CUs0.lds_no_flat_insts 6 # Number of LDS insts issued, not including FLAT accesses that resolve to LDS.
|
|
system.cpu1.CUs0.lds_no_flat_insts_per_wf 1.500000 # The avg. number of LDS insts (not including FLAT accesses that resolve to LDS) per-wavefront.
|
|
system.cpu1.CUs0.flat_vmem_insts 0 # The number of FLAT insts that resolve to vmem issued.
|
|
system.cpu1.CUs0.flat_vmem_insts_per_wf 0 # The average number of FLAT insts that resolve to vmem issued per-wavefront.
|
|
system.cpu1.CUs0.flat_lds_insts 0 # The number of FLAT insts that resolve to LDS issued.
|
|
system.cpu1.CUs0.flat_lds_insts_per_wf 0 # The average number of FLAT insts that resolve to LDS issued per-wavefront.
|
|
system.cpu1.CUs0.vector_mem_writes 8 # Number of vector mem write insts (excluding FLAT insts).
|
|
system.cpu1.CUs0.vector_mem_writes_per_wf 2 # The average number of vector mem write insts (excluding FLAT insts) per-wavefront.
|
|
system.cpu1.CUs0.vector_mem_reads 29 # Number of vector mem read insts (excluding FLAT insts).
|
|
system.cpu1.CUs0.vector_mem_reads_per_wf 7.250000 # The avg. number of vector mem read insts (excluding FLAT insts) per-wavefront.
|
|
system.cpu1.CUs0.scalar_mem_writes 0 # Number of scalar mem write insts.
|
|
system.cpu1.CUs0.scalar_mem_writes_per_wf 0 # The average number of scalar mem write insts per-wavefront.
|
|
system.cpu1.CUs0.scalar_mem_reads 0 # Number of scalar mem read insts.
|
|
system.cpu1.CUs0.scalar_mem_reads_per_wf 0 # The average number of scalar mem read insts per-wavefront.
|
|
system.cpu1.CUs0.tlb_requests 769 # number of uncoalesced requests
|
|
system.cpu1.CUs0.tlb_cycles -454892896000 # total number of cycles for all uncoalesced requests
|
|
system.cpu1.CUs0.avg_translation_latency -591538226.267880 # Avg. translation latency for data translations
|
|
system.cpu1.CUs0.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs0.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs0.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs0.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs0.lds_bank_access_cnt 54 # Total number of LDS bank accesses
|
|
system.cpu1.CUs0.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::mean 8 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::stdev 6.196773 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::10-11 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::12-13 4 66.67% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs0.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs0.global_mem_instr_cnt 17 # dynamic global memory instructions count
|
|
system.cpu1.CUs0.local_mem_instr_cnt 6 # dynamic local memory intruction count
|
|
system.cpu1.CUs0.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity
|
|
system.cpu1.CUs0.num_instr_executed 141 # number of instructions executed
|
|
system.cpu1.CUs0.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::mean 71.028369 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::stdev 225.061514 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::0-1 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::2-3 12 8.51% 8.51% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::4-5 61 43.26% 51.77% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::6-7 32 22.70% 74.47% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::8-9 3 2.13% 76.60% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::10 3 2.13% 78.72% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::overflows 30 21.28% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::min_value 2 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::max_value 1297 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs0.num_vec_ops_executed 6769 # number of vec ops executed (e.g. WF size/inst)
|
|
system.cpu1.CUs0.num_total_cycles 2840 # number of cycles the CU ran for
|
|
system.cpu1.CUs0.vpc 2.383451 # Vector Operations per cycle (this CU only)
|
|
system.cpu1.CUs0.ipc 0.049648 # Instructions per cycle (this CU only)
|
|
system.cpu1.CUs0.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::mean 48.007092 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::stdev 23.719942 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::9-12 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::13-16 36 25.53% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::mean 37.833333 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::stdev 27.064737 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::9-12 0 0.00% 5.56% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::13-16 8 44.44% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::mean 19.500000 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::stdev 22.322634 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::9-12 0 0.00% 16.67% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::13-16 4 66.67% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs0.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed
|
|
system.cpu1.CUs0.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD
|
|
system.cpu1.CUs0.num_CAS_ops 0 # number of compare and swap operations
|
|
system.cpu1.CUs0.num_failed_CAS_ops 0 # number of compare and swap operations that failed
|
|
system.cpu1.CUs0.num_completed_wfs 4 # number of completed wavefronts
|
|
system.cpu1.CUs1.localDataStore.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu1.CUs1.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts00.timesBlockedDueRAWDependencies 406 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts08.timesBlockedDueRAWDependencies 381 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts16.timesBlockedDueRAWDependencies 372 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts24.timesBlockedDueRAWDependencies 364 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
|
|
system.cpu1.CUs1.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
|
|
system.cpu1.CUs1.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
|
|
system.cpu1.CUs1.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::samples 35 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::mean 11.257143 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::stdev 5.595917 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::2 4 11.43% 11.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::3 4 11.43% 22.86% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::4 1 2.86% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::5 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::6 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::7 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::8 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::9 0 0.00% 25.71% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::10 4 11.43% 37.14% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::11 4 11.43% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::12 0 0.00% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::13 0 0.00% 48.57% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::14 1 2.86% 51.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::15 0 0.00% 51.43% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::16 17 48.57% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::max_value 16 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::total 35 # For each instruction fetch request recieved record how many instructions you got from it
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_no_issue 2740 # number of cycles the CU issues nothing
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_issued 100 # number of cycles the CU issued at least one instruction
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 795 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 437 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 431 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 422 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::GM 408 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::LM 22 # Number of cycles no instruction of specific type issued
|
|
system.cpu1.CUs1.ExecStage.spc::samples 2840 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::mean 0.049648 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::stdev 0.275831 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::0 2740 96.48% 96.48% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::1 59 2.08% 98.56% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::2 41 1.44% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::3 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::max_value 2 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.spc::total 2840 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
|
|
system.cpu1.CUs1.ExecStage.num_transitions_active_to_idle 91 # number of CU transitions from active to idle
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::samples 91 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::mean 30.010989 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::stdev 148.108031 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::0-4 76 83.52% 83.52% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::5-9 8 8.79% 92.31% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 92.31% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::15-19 0 0.00% 92.31% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::20-24 0 0.00% 92.31% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::25-29 1 1.10% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::75 0 0.00% 93.41% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::overflows 6 6.59% 100.00% # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::max_value 1299 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::total 91 # duration of idle periods in cycles
|
|
system.cpu1.CUs1.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF
|
|
system.cpu1.CUs1.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF
|
|
system.cpu1.CUs1.valu_insts 68 # Number of vector ALU insts issued.
|
|
system.cpu1.CUs1.valu_insts_per_wf 17 # The avg. number of vector ALU insts issued per-wavefront.
|
|
system.cpu1.CUs1.salu_insts 0 # Number of scalar ALU insts issued.
|
|
system.cpu1.CUs1.salu_insts_per_wf 0 # The avg. number of scalar ALU insts issued per-wavefront.
|
|
system.cpu1.CUs1.inst_cycles_valu 68 # Number of cycles needed to execute VALU insts.
|
|
system.cpu1.CUs1.inst_cycles_salu 0 # Number of cycles needed to execute SALU insts.
|
|
system.cpu1.CUs1.thread_cycles_valu 3071 # Number of thread cycles used to execute vector ALU ops. Similar to instCyclesVALU but multiplied by the number of active threads.
|
|
system.cpu1.CUs1.valu_utilization 70.565257 # Percentage of active vector ALU threads in a wave.
|
|
system.cpu1.CUs1.lds_no_flat_insts 6 # Number of LDS insts issued, not including FLAT accesses that resolve to LDS.
|
|
system.cpu1.CUs1.lds_no_flat_insts_per_wf 1.500000 # The avg. number of LDS insts (not including FLAT accesses that resolve to LDS) per-wavefront.
|
|
system.cpu1.CUs1.flat_vmem_insts 0 # The number of FLAT insts that resolve to vmem issued.
|
|
system.cpu1.CUs1.flat_vmem_insts_per_wf 0 # The average number of FLAT insts that resolve to vmem issued per-wavefront.
|
|
system.cpu1.CUs1.flat_lds_insts 0 # The number of FLAT insts that resolve to LDS issued.
|
|
system.cpu1.CUs1.flat_lds_insts_per_wf 0 # The average number of FLAT insts that resolve to LDS issued per-wavefront.
|
|
system.cpu1.CUs1.vector_mem_writes 8 # Number of vector mem write insts (excluding FLAT insts).
|
|
system.cpu1.CUs1.vector_mem_writes_per_wf 2 # The average number of vector mem write insts (excluding FLAT insts) per-wavefront.
|
|
system.cpu1.CUs1.vector_mem_reads 29 # Number of vector mem read insts (excluding FLAT insts).
|
|
system.cpu1.CUs1.vector_mem_reads_per_wf 7.250000 # The avg. number of vector mem read insts (excluding FLAT insts) per-wavefront.
|
|
system.cpu1.CUs1.scalar_mem_writes 0 # Number of scalar mem write insts.
|
|
system.cpu1.CUs1.scalar_mem_writes_per_wf 0 # The average number of scalar mem write insts per-wavefront.
|
|
system.cpu1.CUs1.scalar_mem_reads 0 # Number of scalar mem read insts.
|
|
system.cpu1.CUs1.scalar_mem_reads_per_wf 0 # The average number of scalar mem read insts per-wavefront.
|
|
system.cpu1.CUs1.tlb_requests 769 # number of uncoalesced requests
|
|
system.cpu1.CUs1.tlb_cycles -454919630000 # total number of cycles for all uncoalesced requests
|
|
system.cpu1.CUs1.avg_translation_latency -591572990.897269 # Avg. translation latency for data translations
|
|
system.cpu1.CUs1.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs1.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs1.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs1.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
|
|
system.cpu1.CUs1.lds_bank_access_cnt 53 # Total number of LDS bank accesses
|
|
system.cpu1.CUs1.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::mean 7.833333 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::stdev 6.080022 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::10-11 1 16.67% 50.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::12-13 3 50.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet
|
|
system.cpu1.CUs1.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.)
|
|
system.cpu1.CUs1.global_mem_instr_cnt 17 # dynamic global memory instructions count
|
|
system.cpu1.CUs1.local_mem_instr_cnt 6 # dynamic local memory intruction count
|
|
system.cpu1.CUs1.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity
|
|
system.cpu1.CUs1.num_instr_executed 141 # number of instructions executed
|
|
system.cpu1.CUs1.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::mean 72.113475 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::stdev 228.065470 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::0-1 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::2-3 13 9.22% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::4-5 60 42.55% 51.77% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::6-7 34 24.11% 75.89% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::8-9 3 2.13% 78.01% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::10 1 0.71% 78.72% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::overflows 30 21.28% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::min_value 2 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::max_value 1305 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
|
|
system.cpu1.CUs1.num_vec_ops_executed 6762 # number of vec ops executed (e.g. WF size/inst)
|
|
system.cpu1.CUs1.num_total_cycles 2840 # number of cycles the CU ran for
|
|
system.cpu1.CUs1.vpc 2.380986 # Vector Operations per cycle (this CU only)
|
|
system.cpu1.CUs1.ipc 0.049648 # Instructions per cycle (this CU only)
|
|
system.cpu1.CUs1.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::mean 47.957447 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::stdev 23.818022 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::9-12 9 6.38% 9.93% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::13-16 27 19.15% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions)
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::mean 37.722222 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::stdev 27.174394 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::9-12 2 11.11% 16.67% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::13-16 6 33.33% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::mean 19.333333 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::stdev 22.384518 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::9-12 1 16.67% 33.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::13-16 3 50.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction
|
|
system.cpu1.CUs1.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed
|
|
system.cpu1.CUs1.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD
|
|
system.cpu1.CUs1.num_CAS_ops 0 # number of compare and swap operations
|
|
system.cpu1.CUs1.num_failed_CAS_ops 0 # number of compare and swap operations that failed
|
|
system.cpu1.CUs1.num_completed_wfs 4 # number of completed wavefronts
|
|
system.cpu1.CUs0.ldsBus.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu1.CUs1.ldsBus.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu2.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.cpu2.num_kernel_launched 1 # number of kernel launched
|
|
system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits
|
|
system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses
|
|
system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses
|
|
system.dir_cntrl0.L3CacheMemory.num_data_array_writes 1549 # number of data array writes
|
|
system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 1549 # number of tag array reads
|
|
system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 1549 # number of tag array writes
|
|
system.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.dispatcher_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.dispatcher_coalescer.clk_domain.clock 1000 # Clock period in ticks
|
|
system.dispatcher_coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.dispatcher_coalescer.uncoalesced_accesses 0 # Number of uncoalesced TLB accesses
|
|
system.dispatcher_coalescer.coalesced_accesses 0 # Number of coalesced TLB accesses
|
|
system.dispatcher_coalescer.queuing_cycles 0 # Number of cycles spent in queue
|
|
system.dispatcher_coalescer.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.dispatcher_coalescer.local_latency nan # Avg. latency over all incoming pkts
|
|
system.dispatcher_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.dispatcher_tlb.clk_domain.clock 1000 # Clock period in ticks
|
|
system.dispatcher_tlb.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.dispatcher_tlb.local_TLB_accesses 0 # Number of TLB accesses
|
|
system.dispatcher_tlb.local_TLB_hits 0 # Number of TLB hits
|
|
system.dispatcher_tlb.local_TLB_misses 0 # Number of TLB misses
|
|
system.dispatcher_tlb.local_TLB_miss_rate nan # TLB miss rate
|
|
system.dispatcher_tlb.global_TLB_accesses 0 # Number of TLB accesses
|
|
system.dispatcher_tlb.global_TLB_hits 0 # Number of TLB hits
|
|
system.dispatcher_tlb.global_TLB_misses 0 # Number of TLB misses
|
|
system.dispatcher_tlb.global_TLB_miss_rate nan # TLB miss rate
|
|
system.dispatcher_tlb.access_cycles 0 # Cycles spent accessing this TLB level
|
|
system.dispatcher_tlb.page_table_cycles 0 # Cycles spent accessing the page table
|
|
system.dispatcher_tlb.unique_pages 0 # Number of unique pages touched
|
|
system.dispatcher_tlb.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.dispatcher_tlb.local_latency nan # Avg. latency over incoming coalesced reqs
|
|
system.dispatcher_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.l1_coalescer0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l1_coalescer0.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l1_coalescer0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l1_coalescer0.uncoalesced_accesses 778 # Number of uncoalesced TLB accesses
|
|
system.l1_coalescer0.coalesced_accesses 0 # Number of coalesced TLB accesses
|
|
system.l1_coalescer0.queuing_cycles 0 # Number of cycles spent in queue
|
|
system.l1_coalescer0.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.l1_coalescer0.local_latency 0 # Avg. latency over all incoming pkts
|
|
system.l1_coalescer1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l1_coalescer1.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l1_coalescer1.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l1_coalescer1.uncoalesced_accesses 769 # Number of uncoalesced TLB accesses
|
|
system.l1_coalescer1.coalesced_accesses 0 # Number of coalesced TLB accesses
|
|
system.l1_coalescer1.queuing_cycles 0 # Number of cycles spent in queue
|
|
system.l1_coalescer1.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.l1_coalescer1.local_latency 0 # Avg. latency over all incoming pkts
|
|
system.l1_tlb0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l1_tlb0.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l1_tlb0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l1_tlb0.local_TLB_accesses 778 # Number of TLB accesses
|
|
system.l1_tlb0.local_TLB_hits 774 # Number of TLB hits
|
|
system.l1_tlb0.local_TLB_misses 4 # Number of TLB misses
|
|
system.l1_tlb0.local_TLB_miss_rate 0.514139 # TLB miss rate
|
|
system.l1_tlb0.global_TLB_accesses 778 # Number of TLB accesses
|
|
system.l1_tlb0.global_TLB_hits 774 # Number of TLB hits
|
|
system.l1_tlb0.global_TLB_misses 4 # Number of TLB misses
|
|
system.l1_tlb0.global_TLB_miss_rate 0.514139 # TLB miss rate
|
|
system.l1_tlb0.access_cycles 0 # Cycles spent accessing this TLB level
|
|
system.l1_tlb0.page_table_cycles 0 # Cycles spent accessing the page table
|
|
system.l1_tlb0.unique_pages 4 # Number of unique pages touched
|
|
system.l1_tlb0.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.l1_tlb0.local_latency 0 # Avg. latency over incoming coalesced reqs
|
|
system.l1_tlb0.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.l1_tlb1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l1_tlb1.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l1_tlb1.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l1_tlb1.local_TLB_accesses 769 # Number of TLB accesses
|
|
system.l1_tlb1.local_TLB_hits 766 # Number of TLB hits
|
|
system.l1_tlb1.local_TLB_misses 3 # Number of TLB misses
|
|
system.l1_tlb1.local_TLB_miss_rate 0.390117 # TLB miss rate
|
|
system.l1_tlb1.global_TLB_accesses 769 # Number of TLB accesses
|
|
system.l1_tlb1.global_TLB_hits 766 # Number of TLB hits
|
|
system.l1_tlb1.global_TLB_misses 3 # Number of TLB misses
|
|
system.l1_tlb1.global_TLB_miss_rate 0.390117 # TLB miss rate
|
|
system.l1_tlb1.access_cycles 0 # Cycles spent accessing this TLB level
|
|
system.l1_tlb1.page_table_cycles 0 # Cycles spent accessing the page table
|
|
system.l1_tlb1.unique_pages 3 # Number of unique pages touched
|
|
system.l1_tlb1.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
|
|
system.l1_tlb1.local_latency 0 # Avg. latency over incoming coalesced reqs
|
|
system.l1_tlb1.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.l2_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l2_coalescer.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l2_coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l2_coalescer.uncoalesced_accesses 8 # Number of uncoalesced TLB accesses
|
|
system.l2_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses
|
|
system.l2_coalescer.queuing_cycles 8000 # Number of cycles spent in queue
|
|
system.l2_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs
|
|
system.l2_coalescer.local_latency 125 # Avg. latency over all incoming pkts
|
|
system.l2_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l2_tlb.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l2_tlb.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l2_tlb.local_TLB_accesses 8 # Number of TLB accesses
|
|
system.l2_tlb.local_TLB_hits 3 # Number of TLB hits
|
|
system.l2_tlb.local_TLB_misses 5 # Number of TLB misses
|
|
system.l2_tlb.local_TLB_miss_rate 62.500000 # TLB miss rate
|
|
system.l2_tlb.global_TLB_accesses 15 # Number of TLB accesses
|
|
system.l2_tlb.global_TLB_hits 3 # Number of TLB hits
|
|
system.l2_tlb.global_TLB_misses 12 # Number of TLB misses
|
|
system.l2_tlb.global_TLB_miss_rate 80 # TLB miss rate
|
|
system.l2_tlb.access_cycles 552008 # Cycles spent accessing this TLB level
|
|
system.l2_tlb.page_table_cycles 0 # Cycles spent accessing the page table
|
|
system.l2_tlb.unique_pages 5 # Number of unique pages touched
|
|
system.l2_tlb.local_cycles 69001 # Number of cycles spent in queue for all incoming reqs
|
|
system.l2_tlb.local_latency 8625.125000 # Avg. latency over incoming coalesced reqs
|
|
system.l2_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.l3_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l3_coalescer.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l3_coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l3_coalescer.uncoalesced_accesses 5 # Number of uncoalesced TLB accesses
|
|
system.l3_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses
|
|
system.l3_coalescer.queuing_cycles 8000 # Number of cycles spent in queue
|
|
system.l3_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs
|
|
system.l3_coalescer.local_latency 200 # Avg. latency over all incoming pkts
|
|
system.l3_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.l3_tlb.clk_domain.clock 1000 # Clock period in ticks
|
|
system.l3_tlb.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.l3_tlb.local_TLB_accesses 5 # Number of TLB accesses
|
|
system.l3_tlb.local_TLB_hits 0 # Number of TLB hits
|
|
system.l3_tlb.local_TLB_misses 5 # Number of TLB misses
|
|
system.l3_tlb.local_TLB_miss_rate 100 # TLB miss rate
|
|
system.l3_tlb.global_TLB_accesses 12 # Number of TLB accesses
|
|
system.l3_tlb.global_TLB_hits 0 # Number of TLB hits
|
|
system.l3_tlb.global_TLB_misses 12 # Number of TLB misses
|
|
system.l3_tlb.global_TLB_miss_rate 100 # TLB miss rate
|
|
system.l3_tlb.access_cycles 1200000 # Cycles spent accessing this TLB level
|
|
system.l3_tlb.page_table_cycles 6000000 # Cycles spent accessing the page table
|
|
system.l3_tlb.unique_pages 5 # Number of unique pages touched
|
|
system.l3_tlb.local_cycles 150000 # Number of cycles spent in queue for all incoming reqs
|
|
system.l3_tlb.local_latency 30000 # Avg. latency over incoming coalesced reqs
|
|
system.l3_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.piobus.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.piobus.trans_dist::WriteReq 94 # Transaction distribution
|
|
system.piobus.trans_dist::WriteResp 94 # Transaction distribution
|
|
system.piobus.pkt_count_system.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 188 # Packet count per connected master and slave (bytes)
|
|
system.piobus.pkt_count::total 188 # Packet count per connected master and slave (bytes)
|
|
system.piobus.pkt_size_system.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 748 # Cumulative packet size per connected master and slave (bytes)
|
|
system.piobus.pkt_size::total 748 # Cumulative packet size per connected master and slave (bytes)
|
|
system.piobus.reqLayer0.occupancy 188000 # Layer occupancy (ticks)
|
|
system.piobus.reqLayer0.utilization 0.0 # Layer utilization (%)
|
|
system.piobus.respLayer0.occupancy 94000 # Layer occupancy (ticks)
|
|
system.piobus.respLayer0.utilization 0.0 # Layer utilization (%)
|
|
system.ruby.network.ext_links0.int_node.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.ext_links0.int_node.percent_links_utilized 0.007895
|
|
system.ruby.network.ext_links0.int_node.msg_count.Control::0 1549
|
|
system.ruby.network.ext_links0.int_node.msg_count.Request_Control::0 1549
|
|
system.ruby.network.ext_links0.int_node.msg_count.Response_Data::2 1561
|
|
system.ruby.network.ext_links0.int_node.msg_count.Response_Control::2 1537
|
|
system.ruby.network.ext_links0.int_node.msg_count.Unblock_Control::4 1549
|
|
system.ruby.network.ext_links0.int_node.msg_bytes.Control::0 12392
|
|
system.ruby.network.ext_links0.int_node.msg_bytes.Request_Control::0 12392
|
|
system.ruby.network.ext_links0.int_node.msg_bytes.Response_Data::2 112392
|
|
system.ruby.network.ext_links0.int_node.msg_bytes.Response_Control::2 12296
|
|
system.ruby.network.ext_links0.int_node.msg_bytes.Unblock_Control::4 12392
|
|
system.ruby.network.ext_links1.int_node.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.ext_links1.int_node.percent_links_utilized 0.009908
|
|
system.ruby.network.ext_links1.int_node.msg_count.Control::0 14
|
|
system.ruby.network.ext_links1.int_node.msg_count.Request_Control::0 1535
|
|
system.ruby.network.ext_links1.int_node.msg_count.Response_Data::2 1537
|
|
system.ruby.network.ext_links1.int_node.msg_count.Response_Control::2 12
|
|
system.ruby.network.ext_links1.int_node.msg_count.Unblock_Control::4 1535
|
|
system.ruby.network.ext_links1.int_node.msg_bytes.Control::0 112
|
|
system.ruby.network.ext_links1.int_node.msg_bytes.Request_Control::0 12280
|
|
system.ruby.network.ext_links1.int_node.msg_bytes.Response_Data::2 110664
|
|
system.ruby.network.ext_links1.int_node.msg_bytes.Response_Control::2 96
|
|
system.ruby.network.ext_links1.int_node.msg_bytes.Unblock_Control::4 12280
|
|
system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
|
|
system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
|
|
system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
|
|
system.tcp_cntrl0.L1cache.num_data_array_reads 8 # number of data array reads
|
|
system.tcp_cntrl0.L1cache.num_data_array_writes 11 # number of data array writes
|
|
system.tcp_cntrl0.L1cache.num_tag_array_reads 26 # number of tag array reads
|
|
system.tcp_cntrl0.L1cache.num_tag_array_writes 18 # number of tag array writes
|
|
system.tcp_cntrl0.L1cache.num_data_array_stalls 6 # number of stalls caused by data array
|
|
system.tcp_cntrl0.coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 2 # loads that hit in the TCP
|
|
system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers
|
|
system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
|
|
system.tcp_cntrl0.coalescer.gpu_ld_misses 2 # loads that miss in the GPU
|
|
system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 4 # stores that hit in the TCP
|
|
system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers
|
|
system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
|
|
system.tcp_cntrl0.coalescer.gpu_st_misses 5 # stores that miss in the GPU
|
|
system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
|
|
system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
|
|
system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
|
|
system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU
|
|
system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
|
|
system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
|
|
system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
|
|
system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU
|
|
system.tcp_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tcp_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.ext_links2.int_node.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.ext_links2.int_node.percent_links_utilized 0.000708
|
|
system.ruby.network.ext_links2.int_node.msg_count.Control::0 1535
|
|
system.ruby.network.ext_links2.int_node.msg_count.Control::1 14
|
|
system.ruby.network.ext_links2.int_node.msg_count.Request_Control::0 14
|
|
system.ruby.network.ext_links2.int_node.msg_count.Request_Control::1 17
|
|
system.ruby.network.ext_links2.int_node.msg_count.Response_Data::2 24
|
|
system.ruby.network.ext_links2.int_node.msg_count.Response_Data::3 31
|
|
system.ruby.network.ext_links2.int_node.msg_count.Response_Control::2 1525
|
|
system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::4 14
|
|
system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::5 17
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Control::0 12280
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Control::1 112
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::0 112
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::1 136
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::2 1728
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::3 2232
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Response_Control::2 12200
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::4 112
|
|
system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::5 136
|
|
system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits
|
|
system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses
|
|
system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses
|
|
system.tcp_cntrl1.L1cache.num_data_array_reads 8 # number of data array reads
|
|
system.tcp_cntrl1.L1cache.num_data_array_writes 11 # number of data array writes
|
|
system.tcp_cntrl1.L1cache.num_tag_array_reads 25 # number of tag array reads
|
|
system.tcp_cntrl1.L1cache.num_tag_array_writes 18 # number of tag array writes
|
|
system.tcp_cntrl1.L1cache.num_tag_array_stalls 2 # number of stalls caused by tag array
|
|
system.tcp_cntrl1.L1cache.num_data_array_stalls 6 # number of stalls caused by data array
|
|
system.tcp_cntrl1.coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 3 # loads that hit in the TCP
|
|
system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 2 # TCP to TCP load transfers
|
|
system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
|
|
system.tcp_cntrl1.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
|
|
system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 4 # stores that hit in the TCP
|
|
system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 1 # TCP to TCP store transfers
|
|
system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
|
|
system.tcp_cntrl1.coalescer.gpu_st_misses 4 # stores that miss in the GPU
|
|
system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
|
|
system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
|
|
system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
|
|
system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU
|
|
system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
|
|
system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
|
|
system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
|
|
system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU
|
|
system.tcp_cntrl1.sequencer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tcp_cntrl1.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
|
|
system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
|
|
system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
|
|
system.sqc_cntrl0.L1cache.num_data_array_reads 70 # number of data array reads
|
|
system.sqc_cntrl0.L1cache.num_data_array_writes 3 # number of data array writes
|
|
system.sqc_cntrl0.L1cache.num_tag_array_reads 70 # number of tag array reads
|
|
system.sqc_cntrl0.L1cache.num_tag_array_writes 3 # number of tag array writes
|
|
system.sqc_cntrl0.L1cache.num_data_array_stalls 28 # number of stalls caused by data array
|
|
system.sqc_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.sqc_cntrl0.sequencer.load_waiting_on_load 75 # Number of times a load aliased with a pending load
|
|
system.sqc_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
|
|
system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses
|
|
system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses
|
|
system.tcc_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits
|
|
system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses
|
|
system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses
|
|
system.tccdir_cntrl0.directory.num_tag_array_reads 1552 # number of tag array reads
|
|
system.tccdir_cntrl0.directory.num_tag_array_writes 25 # number of tag array writes
|
|
system.tccdir_cntrl0.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.msg_count.Control 3112
|
|
system.ruby.network.msg_count.Request_Control 3115
|
|
system.ruby.network.msg_count.Response_Data 3153
|
|
system.ruby.network.msg_count.Response_Control 3074
|
|
system.ruby.network.msg_count.Unblock_Control 3115
|
|
system.ruby.network.msg_byte.Control 24896
|
|
system.ruby.network.msg_byte.Request_Control 24920
|
|
system.ruby.network.msg_byte.Response_Data 227016
|
|
system.ruby.network.msg_byte.Response_Control 24592
|
|
system.ruby.network.msg_byte.Unblock_Control 24920
|
|
system.sqc_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.sqc_coalescer.clk_domain.clock 1000 # Clock period in ticks
|
|
system.sqc_coalescer.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.sqc_coalescer.uncoalesced_accesses 70 # Number of uncoalesced TLB accesses
|
|
system.sqc_coalescer.coalesced_accesses 50 # Number of coalesced TLB accesses
|
|
system.sqc_coalescer.queuing_cycles 100000 # Number of cycles spent in queue
|
|
system.sqc_coalescer.local_queuing_cycles 100000 # Number of cycles spent in queue for all incoming reqs
|
|
system.sqc_coalescer.local_latency 1428.571429 # Avg. latency over all incoming pkts
|
|
system.sqc_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
|
|
system.sqc_tlb.clk_domain.clock 1000 # Clock period in ticks
|
|
system.sqc_tlb.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.sqc_tlb.local_TLB_accesses 50 # Number of TLB accesses
|
|
system.sqc_tlb.local_TLB_hits 49 # Number of TLB hits
|
|
system.sqc_tlb.local_TLB_misses 1 # Number of TLB misses
|
|
system.sqc_tlb.local_TLB_miss_rate 2 # TLB miss rate
|
|
system.sqc_tlb.global_TLB_accesses 70 # Number of TLB accesses
|
|
system.sqc_tlb.global_TLB_hits 62 # Number of TLB hits
|
|
system.sqc_tlb.global_TLB_misses 8 # Number of TLB misses
|
|
system.sqc_tlb.global_TLB_miss_rate 11.428571 # TLB miss rate
|
|
system.sqc_tlb.access_cycles 70008 # Cycles spent accessing this TLB level
|
|
system.sqc_tlb.page_table_cycles 0 # Cycles spent accessing the page table
|
|
system.sqc_tlb.unique_pages 1 # Number of unique pages touched
|
|
system.sqc_tlb.local_cycles 50001 # Number of cycles spent in queue for all incoming reqs
|
|
system.sqc_tlb.local_latency 1000.020000 # Avg. latency over incoming coalesced reqs
|
|
system.sqc_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
|
|
system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 667407500 # Cumulative time (in ticks) in various power states
|
|
system.ruby.network.ext_links0.int_node.throttle0.link_utilization 0.005552
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_count.Request_Control::0 1549
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Data::2 12
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Control::2 1537
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_count.Unblock_Control::4 1549
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Request_Control::0 12392
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Data::2 864
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Control::2 12296
|
|
system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Unblock_Control::4 12392
|
|
system.ruby.network.ext_links0.int_node.throttle1.link_utilization 0.016188
|
|
system.ruby.network.ext_links0.int_node.throttle1.msg_count.Control::0 14
|
|
system.ruby.network.ext_links0.int_node.throttle1.msg_count.Response_Data::2 1535
|
|
system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Control::0 112
|
|
system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Response_Data::2 110520
|
|
system.ruby.network.ext_links0.int_node.throttle2.link_utilization 0.001944
|
|
system.ruby.network.ext_links0.int_node.throttle2.msg_count.Control::0 1535
|
|
system.ruby.network.ext_links0.int_node.throttle2.msg_count.Response_Data::2 14
|
|
system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Control::0 12280
|
|
system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Response_Data::2 1008
|
|
system.ruby.network.ext_links1.int_node.throttle0.link_utilization 0.016188
|
|
system.ruby.network.ext_links1.int_node.throttle0.msg_count.Control::0 14
|
|
system.ruby.network.ext_links1.int_node.throttle0.msg_count.Response_Data::2 1535
|
|
system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Control::0 112
|
|
system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Response_Data::2 110520
|
|
system.ruby.network.ext_links1.int_node.throttle1.link_utilization 0.003629
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_count.Request_Control::0 1535
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Data::2 2
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Control::2 12
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_count.Unblock_Control::4 1535
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Request_Control::0 12280
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Data::2 144
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Control::2 96
|
|
system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Unblock_Control::4 12280
|
|
system.ruby.network.ext_links2.int_node.throttle0.link_utilization 0.000083
|
|
system.ruby.network.ext_links2.int_node.throttle0.msg_count.Control::1 8
|
|
system.ruby.network.ext_links2.int_node.throttle0.msg_count.Response_Data::3 7
|
|
system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Control::1 64
|
|
system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Response_Data::3 504
|
|
system.ruby.network.ext_links2.int_node.throttle1.link_utilization 0.000081
|
|
system.ruby.network.ext_links2.int_node.throttle1.msg_count.Control::1 6
|
|
system.ruby.network.ext_links2.int_node.throttle1.msg_count.Response_Data::3 7
|
|
system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Control::1 48
|
|
system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Response_Data::3 504
|
|
system.ruby.network.ext_links2.int_node.throttle2.link_utilization 0
|
|
system.ruby.network.ext_links2.int_node.throttle3.link_utilization 0.002132
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_count.Control::0 1535
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_count.Request_Control::1 17
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::2 14
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::3 14
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_count.Unblock_Control::5 17
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Control::0 12280
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Request_Control::1 136
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::2 1008
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::3 1008
|
|
system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Unblock_Control::5 136
|
|
system.ruby.network.ext_links2.int_node.throttle4.link_utilization 0.000032
|
|
system.ruby.network.ext_links2.int_node.throttle4.msg_count.Response_Data::3 3
|
|
system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Response_Data::3 216
|
|
system.ruby.network.ext_links2.int_node.throttle5.link_utilization 0.001923
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_count.Request_Control::0 14
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_count.Response_Data::2 10
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_count.Response_Control::2 1525
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_count.Unblock_Control::4 14
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Request_Control::0 112
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Response_Data::2 720
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Response_Control::2 12200
|
|
system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Unblock_Control::4 112
|
|
system.ruby.CorePair_Controller.C0_Load_L1miss 180 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.C0_Load_L1hit 16155 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.Ifetch0_L1hit 86007 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.Ifetch0_L1miss 1088 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.C0_Store_L1miss 325 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.C0_Store_L1hit 10448 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.NB_AckS 1043 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.NB_AckM 326 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.NB_AckE 166 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.L1I_Repl 589 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.L1D0_Repl 24 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.L2_to_L1D0 5 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.L2_to_L1I 54 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.PrbInvData 9 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.PrbShrData 5 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I.C0_Load_L1miss 175 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I.Ifetch0_L1miss 1034 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I.C0_Store_L1miss 325 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I.PrbInvData 8 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I.PrbShrData 3 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.S.C0_Load_L1hit 635 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.S.Ifetch0_L1hit 86007 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.S.Ifetch0_L1miss 54 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.S.L1I_Repl 589 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0.C0_Load_L1miss 2 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0.C0_Load_L1hit 2721 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0.C0_Store_L1hit 46 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0.L1D0_Repl 16 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0.PrbShrData 1 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.O.C0_Load_L1hit 3 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.O.C0_Store_L1hit 1 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.C0_Load_L1miss 3 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.C0_Load_L1hit 12796 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.C0_Store_L1hit 10401 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.L1D0_Repl 8 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.PrbInvData 1 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I_M0.NB_AckM 325 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I_E0S.NB_AckS 9 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.I_E0S.NB_AckE 166 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.Si_F0.L2_to_L1I 54 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.O_M0.NB_AckM 1 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.S0.NB_AckS 1034 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.E0_F.L2_to_L1D0 2 0.00% 0.00%
|
|
system.ruby.CorePair_Controller.M0_F.L2_to_L1D0 3 0.00% 0.00%
|
|
system.ruby.Directory_Controller.RdBlkS 1037 0.00% 0.00%
|
|
system.ruby.Directory_Controller.RdBlkM 335 0.00% 0.00%
|
|
system.ruby.Directory_Controller.RdBlk 177 0.00% 0.00%
|
|
system.ruby.Directory_Controller.CPUPrbResp 1549 0.00% 0.00%
|
|
system.ruby.Directory_Controller.ProbeAcksComplete 1549 0.00% 0.00%
|
|
system.ruby.Directory_Controller.MemData 1549 0.00% 0.00%
|
|
system.ruby.Directory_Controller.CoreUnblock 1549 0.00% 0.00%
|
|
system.ruby.Directory_Controller.U.RdBlkS 1037 0.00% 0.00%
|
|
system.ruby.Directory_Controller.U.RdBlkM 335 0.00% 0.00%
|
|
system.ruby.Directory_Controller.U.RdBlk 177 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_M.MemData 35 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_M.MemData 18 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_M.MemData 11 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_PM.CPUPrbResp 35 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_PM.ProbeAcksComplete 35 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_PM.MemData 1002 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_PM.CPUPrbResp 18 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 18 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_PM.MemData 317 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_PM.CPUPrbResp 11 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_PM.ProbeAcksComplete 11 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_PM.MemData 166 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_Pm.CPUPrbResp 1002 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BS_Pm.ProbeAcksComplete 1002 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 317 0.00% 0.00%
|
|
system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 317 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_Pm.CPUPrbResp 166 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 166 0.00% 0.00%
|
|
system.ruby.Directory_Controller.B.CoreUnblock 1549 0.00% 0.00%
|
|
system.ruby.LD.latency_hist_seqr::bucket_size 64
|
|
system.ruby.LD.latency_hist_seqr::max_bucket 639
|
|
system.ruby.LD.latency_hist_seqr::samples 16335
|
|
system.ruby.LD.latency_hist_seqr::mean 4.314539
|
|
system.ruby.LD.latency_hist_seqr::gmean 2.104196
|
|
system.ruby.LD.latency_hist_seqr::stdev 22.794494
|
|
system.ruby.LD.latency_hist_seqr | 16160 98.93% 98.93% | 0 0.00% 98.93% | 0 0.00% 98.93% | 166 1.02% 99.94% | 6 0.04% 99.98% | 1 0.01% 99.99% | 0 0.00% 99.99% | 0 0.00% 99.99% | 0 0.00% 99.99% | 2 0.01% 100.00%
|
|
system.ruby.LD.latency_hist_seqr::total 16335
|
|
system.ruby.LD.latency_hist_coalsr::bucket_size 64
|
|
system.ruby.LD.latency_hist_coalsr::max_bucket 639
|
|
system.ruby.LD.latency_hist_coalsr::samples 9
|
|
system.ruby.LD.latency_hist_coalsr::mean 133.666667
|
|
system.ruby.LD.latency_hist_coalsr::gmean 19.860866
|
|
system.ruby.LD.latency_hist_coalsr::stdev 158.801763
|
|
system.ruby.LD.latency_hist_coalsr | 5 55.56% 55.56% | 0 0.00% 55.56% | 0 0.00% 55.56% | 1 11.11% 66.67% | 1 11.11% 77.78% | 2 22.22% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.latency_hist_coalsr::total 9
|
|
system.ruby.LD.hit_latency_hist_seqr::bucket_size 64
|
|
system.ruby.LD.hit_latency_hist_seqr::max_bucket 639
|
|
system.ruby.LD.hit_latency_hist_seqr::samples 175
|
|
system.ruby.LD.hit_latency_hist_seqr::mean 217.531429
|
|
system.ruby.LD.hit_latency_hist_seqr::gmean 214.409561
|
|
system.ruby.LD.hit_latency_hist_seqr::stdev 50.482703
|
|
system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 166 94.86% 94.86% | 6 3.43% 98.29% | 1 0.57% 98.86% | 0 0.00% 98.86% | 0 0.00% 98.86% | 0 0.00% 98.86% | 2 1.14% 100.00%
|
|
system.ruby.LD.hit_latency_hist_seqr::total 175
|
|
system.ruby.LD.miss_latency_hist_seqr::bucket_size 4
|
|
system.ruby.LD.miss_latency_hist_seqr::max_bucket 39
|
|
system.ruby.LD.miss_latency_hist_seqr::samples 16160
|
|
system.ruby.LD.miss_latency_hist_seqr::mean 2.005569
|
|
system.ruby.LD.miss_latency_hist_seqr::gmean 2.001425
|
|
system.ruby.LD.miss_latency_hist_seqr::stdev 0.316580
|
|
system.ruby.LD.miss_latency_hist_seqr | 16155 99.97% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 5 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.miss_latency_hist_seqr::total 16160
|
|
system.ruby.LD.miss_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.LD.miss_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.LD.miss_latency_hist_coalsr::samples 9
|
|
system.ruby.LD.miss_latency_hist_coalsr::mean 133.666667
|
|
system.ruby.LD.miss_latency_hist_coalsr::gmean 19.860866
|
|
system.ruby.LD.miss_latency_hist_coalsr::stdev 158.801763
|
|
system.ruby.LD.miss_latency_hist_coalsr | 5 55.56% 55.56% | 0 0.00% 55.56% | 0 0.00% 55.56% | 1 11.11% 66.67% | 1 11.11% 77.78% | 2 22.22% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.miss_latency_hist_coalsr::total 9
|
|
system.ruby.ST.latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.latency_hist_seqr::samples 10412
|
|
system.ruby.ST.latency_hist_seqr::mean 8.469939
|
|
system.ruby.ST.latency_hist_seqr::gmean 2.309412
|
|
system.ruby.ST.latency_hist_seqr::stdev 36.833690
|
|
system.ruby.ST.latency_hist_seqr | 10090 96.91% 96.91% | 0 0.00% 96.91% | 0 0.00% 96.91% | 314 3.02% 99.92% | 1 0.01% 99.93% | 5 0.05% 99.98% | 0 0.00% 99.98% | 0 0.00% 99.98% | 0 0.00% 99.98% | 2 0.02% 100.00%
|
|
system.ruby.ST.latency_hist_seqr::total 10412
|
|
system.ruby.ST.latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ST.latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ST.latency_hist_coalsr::samples 16
|
|
system.ruby.ST.latency_hist_coalsr::mean 184.500000
|
|
system.ruby.ST.latency_hist_coalsr::gmean 27.004823
|
|
system.ruby.ST.latency_hist_coalsr::stdev 190.921974
|
|
system.ruby.ST.latency_hist_coalsr | 8 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 4 25.00% 75.00% | 4 25.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.latency_hist_coalsr::total 16
|
|
system.ruby.ST.hit_latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.hit_latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.hit_latency_hist_seqr::samples 322
|
|
system.ruby.ST.hit_latency_hist_seqr::mean 211.208075
|
|
system.ruby.ST.hit_latency_hist_seqr::gmean 209.444324
|
|
system.ruby.ST.hit_latency_hist_seqr::stdev 38.157121
|
|
system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 314 97.52% 97.52% | 1 0.31% 97.83% | 5 1.55% 99.38% | 0 0.00% 99.38% | 0 0.00% 99.38% | 0 0.00% 99.38% | 2 0.62% 100.00%
|
|
system.ruby.ST.hit_latency_hist_seqr::total 322
|
|
system.ruby.ST.miss_latency_hist_seqr::bucket_size 1
|
|
system.ruby.ST.miss_latency_hist_seqr::max_bucket 9
|
|
system.ruby.ST.miss_latency_hist_seqr::samples 10090
|
|
system.ruby.ST.miss_latency_hist_seqr::mean 2
|
|
system.ruby.ST.miss_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10090 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.miss_latency_hist_seqr::total 10090
|
|
system.ruby.ST.miss_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ST.miss_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ST.miss_latency_hist_coalsr::samples 16
|
|
system.ruby.ST.miss_latency_hist_coalsr::mean 184.500000
|
|
system.ruby.ST.miss_latency_hist_coalsr::gmean 27.004823
|
|
system.ruby.ST.miss_latency_hist_coalsr::stdev 190.921974
|
|
system.ruby.ST.miss_latency_hist_coalsr | 8 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 4 25.00% 75.00% | 4 25.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.miss_latency_hist_coalsr::total 16
|
|
system.ruby.ATOMIC.latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ATOMIC.latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ATOMIC.latency_hist_coalsr::samples 2
|
|
system.ruby.ATOMIC.latency_hist_coalsr::mean 295.500000
|
|
system.ruby.ATOMIC.latency_hist_coalsr::gmean 293.237105
|
|
system.ruby.ATOMIC.latency_hist_coalsr::stdev 51.618795
|
|
system.ruby.ATOMIC.latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ATOMIC.latency_hist_coalsr::total 2
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::samples 2
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::mean 295.500000
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::gmean 293.237105
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::stdev 51.618795
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ATOMIC.miss_latency_hist_coalsr::total 2
|
|
system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.latency_hist_seqr::samples 87095
|
|
system.ruby.IFETCH.latency_hist_seqr::mean 4.485148
|
|
system.ruby.IFETCH.latency_hist_seqr::gmean 2.116532
|
|
system.ruby.IFETCH.latency_hist_seqr::stdev 22.815865
|
|
system.ruby.IFETCH.latency_hist_seqr | 86061 98.81% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 1006 1.16% 99.97% | 11 0.01% 99.98% | 12 0.01% 99.99% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 3 0.00% 100.00%
|
|
system.ruby.IFETCH.latency_hist_seqr::total 87095
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::samples 1034
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::mean 210.386847
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::gmean 209.145816
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::stdev 30.434753
|
|
system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1006 97.29% 97.29% | 11 1.06% 98.36% | 12 1.16% 99.52% | 2 0.19% 99.71% | 0 0.00% 99.71% | 0 0.00% 99.71% | 3 0.29% 100.00%
|
|
system.ruby.IFETCH.hit_latency_hist_seqr::total 1034
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 4
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 39
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::samples 86061
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::mean 2.011294
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::gmean 2.002892
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::stdev 0.450747
|
|
system.ruby.IFETCH.miss_latency_hist_seqr | 86007 99.94% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 54 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.miss_latency_hist_seqr::total 86061
|
|
system.ruby.RMW_Read.latency_hist_seqr::bucket_size 32
|
|
system.ruby.RMW_Read.latency_hist_seqr::max_bucket 319
|
|
system.ruby.RMW_Read.latency_hist_seqr::samples 341
|
|
system.ruby.RMW_Read.latency_hist_seqr::mean 4.392962
|
|
system.ruby.RMW_Read.latency_hist_seqr::gmean 2.111743
|
|
system.ruby.RMW_Read.latency_hist_seqr::stdev 21.996747
|
|
system.ruby.RMW_Read.latency_hist_seqr | 337 98.83% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 4 1.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.latency_hist_seqr::total 341
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::bucket_size 32
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::max_bucket 319
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::samples 4
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::mean 206
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::gmean 206.000000
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.hit_latency_hist_seqr::total 4
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::bucket_size 1
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::max_bucket 9
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::samples 337
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::mean 2
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 337 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.miss_latency_hist_seqr::total 337
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Read.latency_hist_seqr::total 10
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::total 10
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Write.latency_hist_seqr::total 10
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::total 10
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::samples 112609
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::mean 2
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 112609 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.L1Cache.miss_mach_latency_hist_seqr::total 112609
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::bucket_size 4
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::max_bucket 39
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::samples 59
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::mean 20
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::gmean 20.000000
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 59 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.L2Cache.miss_mach_latency_hist_seqr::total 59
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::samples 1535
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::mean 211.362215
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::gmean 209.793806
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::stdev 34.965177
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1490 97.07% 97.07% | 18 1.17% 98.24% | 18 1.17% 99.41% | 2 0.13% 99.54% | 0 0.00% 99.54% | 0 0.00% 99.54% | 7 0.46% 100.00%
|
|
system.ruby.Directory.hit_mach_latency_hist_seqr::total 1535
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::samples 3
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::mean 338.666667
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::gmean 338.633640
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::stdev 5.773503
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 3 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::total 3
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::bucket_size 1
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::max_bucket 9
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::samples 13
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::mean 2.153846
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::gmean 2.109532
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::stdev 0.554700
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 12 92.31% 92.31% | 0 0.00% 92.31% | 1 7.69% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.TCP.miss_mach_latency_hist_coalsr::total 13
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::samples 11
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::mean 336.545455
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::gmean 330.845159
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::stdev 64.151950
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 9.09% 9.09% | 2 18.18% 27.27% | 4 36.36% 63.64% | 4 36.36% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.TCCdir.miss_mach_latency_hist_coalsr::total 11
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::samples 16155
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 16155 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::total 16155
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::bucket_size 4
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::max_bucket 39
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::samples 5
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::mean 20
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::gmean 20.000000
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 5 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::total 5
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::samples 175
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::mean 217.531429
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::gmean 214.409561
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::stdev 50.482703
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 166 94.86% 94.86% | 6 3.43% 98.29% | 1 0.57% 98.86% | 0 0.00% 98.86% | 0 0.00% 98.86% | 0 0.00% 98.86% | 2 1.14% 100.00%
|
|
system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::total 175
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 2
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 342
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 342.000000
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 2 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 2
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::samples 5
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::mean 2.400000
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::gmean 2.297397
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::stdev 0.894427
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 80.00% 80.00% | 0 0.00% 80.00% | 1 20.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::total 5
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 32
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 319
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::samples 2
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::mean 253.500000
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 253.440328
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 7.778175
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::total 2
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::samples 10090
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10090 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::total 10090
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::samples 322
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::mean 211.208075
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::gmean 209.444324
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::stdev 38.157121
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 314 97.52% 97.52% | 1 0.31% 97.83% | 5 1.55% 99.38% | 0 0.00% 99.38% | 0 0.00% 99.38% | 0 0.00% 99.38% | 2 0.62% 100.00%
|
|
system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::total 322
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::samples 8
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::mean 2
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::gmean 2
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 8 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::total 8
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::samples 8
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::mean 367
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 364.630235
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 44.510031
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 50.00% 50.00% | 4 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::total 8
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 64
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 639
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 1
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 332
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 332.000000
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::stdev nan
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 1
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 32
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 319
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::samples 1
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::mean 259
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 259.000000
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::stdev nan
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::total 1
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::samples 86007
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 86007 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::total 86007
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::bucket_size 4
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::max_bucket 39
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::samples 54
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::mean 20
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::gmean 20.000000
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 54 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::total 54
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::bucket_size 64
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::max_bucket 639
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::samples 1034
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::mean 210.386847
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::gmean 209.145816
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::stdev 30.434753
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1006 97.29% 97.29% | 11 1.06% 98.36% | 12 1.16% 99.52% | 2 0.19% 99.71% | 0 0.00% 99.71% | 0 0.00% 99.71% | 3 0.29% 100.00%
|
|
system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::total 1034
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::samples 337
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 337 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::total 337
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::bucket_size 32
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::max_bucket 319
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::samples 4
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::mean 206
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::gmean 206.000000
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::total 4
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::total 10
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::samples 10
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::total 10
|
|
system.ruby.SQC_Controller.Fetch 70 0.00% 0.00%
|
|
system.ruby.SQC_Controller.TCC_AckS 3 0.00% 0.00%
|
|
system.ruby.SQC_Controller.I.Fetch 3 0.00% 0.00%
|
|
system.ruby.SQC_Controller.S.Fetch 67 0.00% 0.00%
|
|
system.ruby.SQC_Controller.I_S.TCC_AckS 3 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.RdBlk 54 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.RdBlkM 34 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.RdBlkS 3 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CPUPrbResp 14 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.ProbeAcksComplete 13 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CoreUnblock 15 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.LastCoreUnblock 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.NB_AckS 5 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.NB_AckM 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.PrbInvData 326 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.PrbShrData 1209 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I.RdBlk 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I.RdBlkM 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I.RdBlkS 3 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I.PrbInvData 325 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I.PrbShrData 1200 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.S.RdBlk 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.S.PrbInvData 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.M.RdBlkM 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.M.PrbShrData 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CP_I.CPUPrbResp 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CP_I.ProbeAcksComplete 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CP_O.CPUPrbResp 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.CP_O.ProbeAcksComplete 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I_M.RdBlkM 20 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I_M.NB_AckM 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I_ES.RdBlk 41 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I_ES.NB_AckS 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.I_S.NB_AckS 3 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBS_S.CPUPrbResp 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBS_S.ProbeAcksComplete 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBM_M.CPUPrbResp 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBM_M.ProbeAcksComplete 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BB_M.CoreUnblock 1 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BB_S.LastCoreUnblock 2 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBB_S.RdBlk 9 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBB_S.CoreUnblock 5 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBB_M.RdBlkM 4 0.00% 0.00%
|
|
system.ruby.TCCdir_Controller.BBB_M.CoreUnblock 9 0.00% 0.00%
|
|
system.ruby.TCP_Controller.Load | 4 44.44% 44.44% | 5 55.56% 100.00%
|
|
system.ruby.TCP_Controller.Load::total 9
|
|
system.ruby.TCP_Controller.Store | 9 50.00% 50.00% | 9 50.00% 100.00%
|
|
system.ruby.TCP_Controller.Store::total 18
|
|
system.ruby.TCP_Controller.TCC_AckS | 2 50.00% 50.00% | 2 50.00% 100.00%
|
|
system.ruby.TCP_Controller.TCC_AckS::total 4
|
|
system.ruby.TCP_Controller.TCC_AckM | 5 50.00% 50.00% | 5 50.00% 100.00%
|
|
system.ruby.TCP_Controller.TCC_AckM::total 10
|
|
system.ruby.TCP_Controller.PrbInvData | 2 66.67% 66.67% | 1 33.33% 100.00%
|
|
system.ruby.TCP_Controller.PrbInvData::total 3
|
|
system.ruby.TCP_Controller.PrbShrData | 6 54.55% 54.55% | 5 45.45% 100.00%
|
|
system.ruby.TCP_Controller.PrbShrData::total 11
|
|
system.ruby.TCP_Controller.I.Load | 2 50.00% 50.00% | 2 50.00% 100.00%
|
|
system.ruby.TCP_Controller.I.Load::total 4
|
|
system.ruby.TCP_Controller.I.Store | 5 50.00% 50.00% | 5 50.00% 100.00%
|
|
system.ruby.TCP_Controller.I.Store::total 10
|
|
system.ruby.TCP_Controller.S.Load | 2 40.00% 40.00% | 3 60.00% 100.00%
|
|
system.ruby.TCP_Controller.S.Load::total 5
|
|
system.ruby.TCP_Controller.S.PrbInvData | 1 50.00% 50.00% | 1 50.00% 100.00%
|
|
system.ruby.TCP_Controller.S.PrbInvData::total 2
|
|
system.ruby.TCP_Controller.S.PrbShrData | 2 100.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.TCP_Controller.S.PrbShrData::total 2
|
|
system.ruby.TCP_Controller.M.Store | 4 50.00% 50.00% | 4 50.00% 100.00%
|
|
system.ruby.TCP_Controller.M.Store::total 8
|
|
system.ruby.TCP_Controller.M.PrbInvData | 1 100.00% 100.00% | 0 0.00% 100.00%
|
|
system.ruby.TCP_Controller.M.PrbInvData::total 1
|
|
system.ruby.TCP_Controller.M.PrbShrData | 4 44.44% 44.44% | 5 55.56% 100.00%
|
|
system.ruby.TCP_Controller.M.PrbShrData::total 9
|
|
system.ruby.TCP_Controller.I_M.TCC_AckM | 5 50.00% 50.00% | 5 50.00% 100.00%
|
|
system.ruby.TCP_Controller.I_M.TCC_AckM::total 10
|
|
system.ruby.TCP_Controller.I_ES.TCC_AckS | 2 50.00% 50.00% | 2 50.00% 100.00%
|
|
system.ruby.TCP_Controller.I_ES.TCC_AckS::total 4
|
|
|
|
---------- End Simulation Statistics ----------
|