gem5/src/cpu/ozone
Steve Reinhardt 3ad761bc8e Make CPU models use new LoadLockedReq/StoreCondReq commands.
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
2007-06-30 20:35:42 -07:00
..
back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
back_end.hh Include the right version of faults.hh 2006-10-28 04:00:24 -04:00
back_end_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
base_dyn_inst.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
bpred_unit.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
checker_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
cpu.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
cpu.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
cpu_builder.cc Fix typo. 2006-11-12 23:31:29 -05:00
cpu_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
dyn_inst.cc Update copyright. 2006-06-07 16:02:55 -04:00
dyn_inst.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
dyn_inst_impl.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00
ea_list.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
ea_list.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
front_end.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
front_end.hh Change getDeviceAddressRanges to use bool for snoop arg. 2007-05-21 23:36:09 -07:00
front_end_impl.hh Updates to support new interrupt processing and removal of PcPAL. 2006-11-12 20:15:30 -05:00
inorder_back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
inorder_back_end.hh Get rid of unused lock code. 2006-12-12 02:21:03 -05:00
inorder_back_end_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
inst_queue.cc Update copyright. 2006-06-07 16:02:55 -04:00
inst_queue.hh Update copyright. 2006-06-07 16:02:55 -04:00
inst_queue_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
lsq_unit.cc Update copyright. 2006-06-07 16:02:55 -04:00
lsq_unit.hh Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable(). 2006-10-08 14:48:24 -07:00
lsq_unit_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
lw_back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
lw_back_end.hh Include the right version of faults.hh 2006-10-28 04:00:24 -04:00
lw_back_end_impl.hh Event descriptions should not end in "event" 2007-06-30 17:45:58 -07:00
lw_lsq.cc Update copyright. 2006-06-07 16:02:55 -04:00
lw_lsq.hh Make CPU models use new LoadLockedReq/StoreCondReq commands. 2007-06-30 20:35:42 -07:00
lw_lsq_impl.hh Make CPU models use new LoadLockedReq/StoreCondReq commands. 2007-06-30 20:35:42 -07:00
null_predictor.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
ozone_base_dyn_inst.cc Split off instantiation into separate CC files for each of the models. This makes it easier to be able to specify only certain CPU models. 2006-06-17 21:39:25 -04:00
ozone_impl.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
OzoneChecker.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
OzoneCPU.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
rename_table.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
rename_table.hh Update copyright. 2006-06-07 16:02:55 -04:00
rename_table_impl.hh Update copyright. 2006-06-07 16:02:55 -04:00
SConscript Fix cut-n-pasto to make the path correct 2007-05-30 17:19:20 -07:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
simple_base_dyn_inst.cc Split off instantiation into separate CC files for each of the models. This makes it easier to be able to specify only certain CPU models. 2006-06-17 21:39:25 -04:00
simple_cpu_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
simple_impl.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
simple_params.hh Merge zizzer.eecs.umich.edu:/bk/newmem/ 2006-11-01 19:00:59 -05:00
SimpleOzoneCPU.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
thread_state.hh *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg 2007-03-07 15:04:31 -05:00