gem5/src/arch/arm/isa/formats
2010-06-02 12:58:07 -05:00
..
basic.isa ARM: Split out the "basic" templates and format. 2010-06-02 12:58:03 -05:00
branch.isa ARM: Decode MRS and MSR for thumb. 2010-06-02 12:58:05 -05:00
data.isa ARM: Decode the usad8 and usada8 instructions. 2010-06-02 12:58:07 -05:00
formats.isa ARM: Implement SVC (was SWI) outside of the decoder. 2010-06-02 12:58:05 -05:00
fp.isa ARM: Decode the VFP load/store multiple instructions. 2010-06-02 12:58:04 -05:00
macromem.isa ARM: Hook up 16 bit thumb load/store multiple. 2010-06-02 12:58:02 -05:00
mem.isa ARM: Rearrange the load/store double/exclusive, table branch thumb decoding. 2010-06-02 12:58:07 -05:00
misc.isa ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones. 2010-06-02 12:58:05 -05:00
mult.isa ARM: Decode the usad8 and usada8 instructions. 2010-06-02 12:58:07 -05:00
pred.isa ARM: Get rid of obsoleted predicated inst formats, etc. 2010-06-02 12:58:02 -05:00
uncond.isa ARM: Implemented prefetch instructions/decoding (pli, pld, pldw). 2010-06-02 12:58:05 -05:00
unimp.isa ARM: Rework how unrecognized/unimplemented instructions are handled. 2010-06-02 12:58:04 -05:00
unknown.isa ARM: Rework how unrecognized/unimplemented instructions are handled. 2010-06-02 12:58:04 -05:00