9a8cb7db7e
Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py
115 lines
5.5 KiB
Python
115 lines
5.5 KiB
Python
# Copyright (c) 2006-2007 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Kevin Lim
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from m5.defines import buildEnv
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from m5.params import *
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from BaseCPU import BaseCPU
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class SimpleOzoneCPU(BaseCPU):
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type = 'SimpleOzoneCPU'
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numThreads = Param.Unsigned("number of HW thread contexts")
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if not buildEnv['FULL_SYSTEM']:
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mem = Param.FunctionalMemory(NULL, "memory")
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width = Param.Unsigned("Width")
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frontEndWidth = Param.Unsigned("Front end width")
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backEndWidth = Param.Unsigned("Back end width")
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backEndSquashLatency = Param.Unsigned("Back end squash latency")
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backEndLatency = Param.Unsigned("Back end latency")
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maxInstBufferSize = Param.Unsigned("Maximum instruction buffer size")
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decodeToFetchDelay = Param.Unsigned("Decode to fetch delay")
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renameToFetchDelay = Param.Unsigned("Rename to fetch delay")
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iewToFetchDelay = Param.Unsigned("Issue/Execute/Writeback to fetch "
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"delay")
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commitToFetchDelay = Param.Unsigned("Commit to fetch delay")
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fetchWidth = Param.Unsigned("Fetch width")
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renameToDecodeDelay = Param.Unsigned("Rename to decode delay")
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iewToDecodeDelay = Param.Unsigned("Issue/Execute/Writeback to decode "
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"delay")
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commitToDecodeDelay = Param.Unsigned("Commit to decode delay")
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fetchToDecodeDelay = Param.Unsigned("Fetch to decode delay")
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decodeWidth = Param.Unsigned("Decode width")
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iewToRenameDelay = Param.Unsigned("Issue/Execute/Writeback to rename "
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"delay")
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commitToRenameDelay = Param.Unsigned("Commit to rename delay")
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decodeToRenameDelay = Param.Unsigned("Decode to rename delay")
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renameWidth = Param.Unsigned("Rename width")
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commitToIEWDelay = Param.Unsigned("Commit to "
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"Issue/Execute/Writeback delay")
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renameToIEWDelay = Param.Unsigned("Rename to "
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"Issue/Execute/Writeback delay")
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issueToExecuteDelay = Param.Unsigned("Issue to execute delay (internal "
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"to the IEW stage)")
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issueWidth = Param.Unsigned("Issue width")
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executeWidth = Param.Unsigned("Execute width")
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executeIntWidth = Param.Unsigned("Integer execute width")
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executeFloatWidth = Param.Unsigned("Floating point execute width")
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executeBranchWidth = Param.Unsigned("Branch execute width")
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executeMemoryWidth = Param.Unsigned("Memory execute width")
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iewToCommitDelay = Param.Unsigned("Issue/Execute/Writeback to commit "
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"delay")
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renameToROBDelay = Param.Unsigned("Rename to reorder buffer delay")
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commitWidth = Param.Unsigned("Commit width")
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squashWidth = Param.Unsigned("Squash width")
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localPredictorSize = Param.Unsigned("Size of local predictor")
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localCtrBits = Param.Unsigned("Bits per counter")
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localHistoryTableSize = Param.Unsigned("Size of local history table")
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localHistoryBits = Param.Unsigned("Bits for the local history")
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globalPredictorSize = Param.Unsigned("Size of global predictor")
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globalCtrBits = Param.Unsigned("Bits per counter")
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globalHistoryBits = Param.Unsigned("Bits of history")
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choicePredictorSize = Param.Unsigned("Size of choice predictor")
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choiceCtrBits = Param.Unsigned("Bits of choice counters")
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BTBEntries = Param.Unsigned("Number of BTB entries")
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BTBTagSize = Param.Unsigned("Size of the BTB tags, in bits")
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RASSize = Param.Unsigned("RAS size")
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LQEntries = Param.Unsigned("Number of load queue entries")
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SQEntries = Param.Unsigned("Number of store queue entries")
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LFSTSize = Param.Unsigned("Last fetched store table size")
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SSITSize = Param.Unsigned("Store set ID table size")
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numPhysIntRegs = Param.Unsigned("Number of physical integer registers")
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numPhysFloatRegs = Param.Unsigned("Number of physical floating point "
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"registers")
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numIQEntries = Param.Unsigned("Number of instruction queue entries")
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numROBEntries = Param.Unsigned("Number of reorder buffer entries")
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instShiftAmt = Param.Unsigned("Number of bits to shift instructions by")
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function_trace = Param.Bool(False, "Enable function trace")
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function_trace_start = Param.Tick(0, "Cycle to start function trace")
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