55e3b9f743
remove unused code
console/Makefile:
cleanup Makefile. Remove unneeded -D options
console/console.c:
Major cleanup and formatting
remove unused #ifdef code
remove unused #includes
rename xxm -> m5
rename simos -> m5
console/dbmentry.S:
console/paljtokern.S:
console/paljtoslave.S:
console/printf.c:
Major cleanup and formatting
remove unused #ifdef code
remove unused #includes
rename __start -> _start to get rid of warning.
h/cserve.h:
h/dc21164FromGasSources.h:
h/ev5_alpha_defs.h:
h/ev5_defs.h:
h/ev5_osfalpha_defs.h:
h/ev5_paldef.h:
h/fromHudsonMacros.h:
h/fromHudsonOsf.h:
h/rpb.h:
Major cleanup and formatting
h/ev5_impure.h:
Major cleanup and formatting
remove unused #ifdef code
palcode/Makefile:
cleanup Makefile
remove unused -D options
unify platform_tlaser.S and platform_tsunami.S into platform.S and
generate multiple .o files using various #defines
unify osfpal.S osfpal_cache_copy.S and osfpal_cache_copy_unaligned.S into
osfpal.S and generate multiple .o files using various #defines
palcode/osfpal.S:
Major cleanup and formatting
remove unused #defines
remove unused #if code
merge copy code into this file.
palcode/platform.S:
Major cleanup and formatting
remove unused #defines
remove unused #if code
merge platform code into this file.
310 lines
8.5 KiB
C
310 lines
8.5 KiB
C
/*
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* Copyright 1993 Hewlett-Packard Development Company, L.P.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef EV5_ALPHA_DEFS_INCLUDED
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#define EV5_ALPHA_DEFS_INCLUDED 1
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// from ev5_alpha_defs.mar from Lance's fetch directory
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// Lower-caseified and $ signs removed ... pb Nov/95
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//
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// PS Layout - PS
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// Loc Size name function
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// ------ ------ ______ -----------------------------------
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// <31:29> 3 SA stack alignment
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// <31:13> 24 RES Reserved MBZ
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// <12:8> 5 IPL Priority level
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// <7> 1 VMM Virtual Mach Monitor
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// <6:5> 2 RES Reserved MBZ
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// <4:3> 2 CM Current Mode
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// <2> 1 IP Interrupt Pending
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// <1:0> 2 SW Software bits
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//
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#define ps_v_sw 0
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#define ps_m_sw (3<<ps_v_sw)
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#define ps_v_ip 2
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#define ps_m_ip (1<<ps_v_ip)
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#define ps_v_cm 3
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#define ps_m_cm (3<<ps_v_cm)
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#define ps_v_vmm 7
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#define ps_m_vmm (1<<ps_v_vmm)
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#define ps_v_ipl 8
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#define ps_m_ipl (0x1f<<ps_v_ipl)
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#define ps_v_sp (0x38)
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#define ps_m_sp (0x3f<<ps_v_sp)
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#define ps_c_kern (0x00)
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#define ps_c_exec (0x08)
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#define ps_c_supr (0x10)
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#define ps_c_user (0x18)
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#define ps_c_ipl0 (0x0000)
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#define ps_c_ipl1 (0x0100)
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#define ps_c_ipl2 (0x0200)
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#define ps_c_ipl3 (0x0300)
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#define ps_c_ipl4 (0x0400)
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#define ps_c_ipl5 (0x0500)
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#define ps_c_ipl6 (0x0600)
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#define ps_c_ipl7 (0x0700)
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#define ps_c_ipl8 (0x0800)
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#define ps_c_ipl9 (0x0900)
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#define ps_c_ipl10 (0x0A00)
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#define ps_c_ipl11 (0x0B00)
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#define ps_c_ipl12 (0x0C00)
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#define ps_c_ipl13 (0x0D00)
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#define ps_c_ipl14 (0x0E00)
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#define ps_c_ipl15 (0x0F00)
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#define ps_c_ipl16 (0x1000)
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#define ps_c_ipl17 (0x1100)
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#define ps_c_ipl18 (0x1200)
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#define ps_c_ipl19 (0x1300)
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#define ps_c_ipl20 (0x1400)
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#define ps_c_ipl21 (0x1500)
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#define ps_c_ipl22 (0x1600)
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#define ps_c_ipl23 (0x1700)
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#define ps_c_ipl24 (0x1800)
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#define ps_c_ipl25 (0x1900)
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#define ps_c_ipl26 (0x1A00)
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#define ps_c_ipl27 (0x1B00)
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#define ps_c_ipl28 (0x1C00)
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#define ps_c_ipl29 (0x1D00)
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#define ps_c_ipl30 (0x1E00)
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#define ps_c_ipl31 (0x1F00)
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//
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// PTE layout - symbol prefix PTE_
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//
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// Loc Size name function
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// ------ ------ ------ -----------------------------------
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// <63:32> 32 PFN Page Frame Number
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// <31:16> 16 SOFT Bits reserved for software use
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// <15> 1 UWE User write enable
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// <14> 1 SWE Super write enable
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// <13> 1 EWE Exec write enable
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// <12> 1 KWE Kernel write enable
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// <11> 1 URE User read enable
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// <10> 1 SRE Super read enable
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// <9> 1 ERE Exec read enable
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// <8> 1 KRE Kernel read enable
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// <7:6> 2 RES Reserved SBZ
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// <5> 1 HPF Huge Page Flag
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// <4> 1 ASM Wild card address space number match
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// <3> 1 FOE Fault On execute
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// <2> 1 FOW Fault On Write
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// <1> 1 FOR Fault On Read
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// <0> 1 V valid bit
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//
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#define pte_v_pfn 32
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#define pte_m_soft (0xFFFF0000)
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#define pte_v_soft 16
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#define pte_m_uwe (0x8000)
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#define pte_v_uwe 15
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#define pte_m_swe (0x4000)
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#define pte_v_swe 14
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#define pte_m_ewe (0x2000)
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#define pte_v_ewe 13
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#define pte_m_kwe (0x1000)
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#define pte_v_kwe 12
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#define pte_m_ure (0x0800)
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#define pte_v_ure 11
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#define pte_m_sre (0x0400)
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#define pte_v_sre 10
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#define pte_m_ere (0x0200)
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#define pte_v_ere 9
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#define pte_m_kre (0x0100)
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#define pte_v_kre 8
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#define pte_m_hpf (0x0020)
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#define pte_v_hpf 5
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#define pte_m_asm (0x0010)
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#define pte_v_asm 4
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#define pte_m_foe (0x0008)
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#define pte_v_foe 3
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#define pte_m_fow (0x0004)
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#define pte_v_fow 2
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#define pte_m_for (0x0002)
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#define pte_v_for 1
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#define pte_m_v (0x0001)
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#define pte_v_v 0
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//
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// VA layout - symbol prefix VA_
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//
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// Loc Size name function
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// ------ ------ ------- -----------------------------------
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// <42:33> 10 SEG1 First seg table offset for mapping
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// <32:23> 10 SEG2 Second seg table offset for mapping
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// <22:13> 10 SEG3 Third seg table offset for mapping
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// <12:0> 13 OFFSET Byte within page
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//
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#define va_m_offset (0x000000001FFF)
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#define va_v_offset 0
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#define va_m_seg3 (0x0000007FE000)
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#define va_v_seg3 13
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#define va_m_seg2 (0x0001FF800000)
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#define va_v_seg2 23
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#define va_m_seg1 (0x7FE00000000)
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#define va_v_seg1 33
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//
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//PRIVILEGED CONTEXT BLOCK (PCB)
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//
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#define pcb_q_ksp 0
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#define pcb_q_esp 8
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#define pcb_q_ssp 16
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#define pcb_q_usp 24
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#define pcb_q_ptbr 32
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#define pcb_q_asn 40
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#define pcb_q_ast 48
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#define pcb_q_fen 56
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#define pcb_q_cc 64
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#define pcb_q_unq 72
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#define pcb_q_sct 80
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#define pcb_v_asten 0
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#define pcb_m_asten (0x0f<<pcb_v_asten)
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#define pcb_v_astsr 4
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#define pcb_m_astsr (0x0f<<pcb_v_astsr)
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#define pcb_v_dat 63
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#define pcb_v_pme 62
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//
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// SYSTEM CONTROL BLOCK (SCB)
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//
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#define scb_v_fen (0x0010)
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#define scb_v_acv (0x0080)
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#define scb_v_tnv (0x0090)
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#define scb_v_for (0x00A0)
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#define scb_v_fow (0x00B0)
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#define scb_v_foe (0x00C0)
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#define scb_v_arith (0x0200)
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#define scb_v_kast (0x0240)
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#define scb_v_east (0x0250)
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#define scb_v_sast (0x0260)
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#define scb_v_uast (0x0270)
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#define scb_v_unalign (0x0280)
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#define scb_v_bpt (0x0400)
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#define scb_v_bugchk (0x0410)
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#define scb_v_opcdec (0x0420)
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#define scb_v_illpal (0x0430)
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#define scb_v_trap (0x0440)
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#define scb_v_chmk (0x0480)
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#define scb_v_chme (0x0490)
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#define scb_v_chms (0x04A0)
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#define scb_v_chmu (0x04B0)
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#define scb_v_sw0 (0x0500)
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#define scb_v_sw1 (0x0510)
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#define scb_v_sw2 (0x0520)
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#define scb_v_sw3 (0x0530)
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#define scb_v_sw4 (0x0540)
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#define scb_v_sw5 (0x0550)
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#define scb_v_sw6 (0x0560)
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#define scb_v_sw7 (0x0570)
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#define scb_v_sw8 (0x0580)
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#define scb_v_sw9 (0x0590)
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#define scb_v_sw10 (0x05A0)
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#define scb_v_sw11 (0x05B0)
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#define scb_v_sw12 (0x05C0)
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#define scb_v_sw13 (0x05D0)
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#define scb_v_sw14 (0x05E0)
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#define scb_v_sw15 (0x05F0)
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#define scb_v_clock (0x0600)
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#define scb_v_inter (0x0610)
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#define scb_v_sys_corr_err (0x0620)
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#define scb_v_proc_corr_err (0x0630)
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#define scb_v_pwrfail (0x0640)
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#define scb_v_perfmon (0x0650)
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#define scb_v_sysmchk (0x0660)
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#define scb_v_procmchk (0x0670)
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#define scb_v_passive_rel (0x06F0)
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//
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// Stack frame (FRM)
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//
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#define frm_v_r2 (0x0000)
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#define frm_v_r3 (0x0008)
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#define frm_v_r4 (0x0010)
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#define frm_v_r5 (0x0018)
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#define frm_v_r6 (0x0020)
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#define frm_v_r7 (0x0028)
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#define frm_v_pc (0x0030)
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#define frm_v_ps (0x0038)
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//
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// Exeception summary register (EXS)
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//
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// exs_v_swc <0> ; Software completion
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// exs_v_inv <1> ; Ivalid operation
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// exs_v_dze <2> ; Div by zero
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// exs_v_fov <3> ; Floating point overflow
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// exs_v_unf <4> ; Floating point underflow
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// exs_v_ine <5> ; Floating point inexact
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// exs_v_iov <6> ; Floating convert to integer overflow
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#define exs_v_swc 0
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#define exs_v_inv 1
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#define exs_v_dze 2
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#define exs_v_fov 3
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#define exs_v_unf 4
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#define exs_v_ine 5
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#define exs_v_iov 6
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#define exs_m_swc (1<<exs_v_swc)
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#define exs_m_inv (1<<exs_v_inv)
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#define exs_m_dze (1<<exs_v_dze)
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#define exs_m_fov (1<<exs_v_fov)
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#define exs_m_unf (1<<exs_v_unf)
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#define exs_m_ine (1<<exs_v_ine)
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#define exs_m_iov (1<<exs_v_iov)
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//
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// machine check error summary register (mces)
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//
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// mces_v_mchk <0> ; machine check in progress
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// mces_v_sce <1> ; system correctable error
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// mces_v_pce <2> ; processor correctable error
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// mces_v_dpc <3> ; disable reporting of processor correctable errors
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// mces_v_dsc <4> ; disable reporting of system correctable errors
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#define mces_v_mchk 0
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#define mces_v_sce 1
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#define mces_v_pce 2
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#define mces_v_dpc 3
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#define mces_v_dsc 4
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#define mces_m_mchk (1<<mces_v_mchk)
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#define mces_m_sce (1<<mces_v_sce)
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#define mces_m_pce (1<<mces_v_pce)
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#define mces_m_dpc (1<<mces_v_dpc)
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#define mces_m_dsc (1<<mces_v_dsc)
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#define mces_m_all ((1<<mces_v_mchk) | (1<<mces_v_sce) | (1<<mces_v_pce) | (1<<mces_v_dpc) | (1<<mces_v_dsc))
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#endif
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