sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/dev
History
Steve Reinhardt 935ba67b4f Get basic full-system working with AtomicSimpleCPU. 
SConscript:
    Comment out sinic for now... needs to be fixed to compile under newmem.
configs/test/SysPaths.py:
    Fix paths.
configs/test/fs.py:
    SimpleCPU -> AtomicSimpleCPU
    Fix vmlinux path
cpu/simple/atomic.cc:
    Fix suspendContext() so quiesce works.
    Don't forget to checkForInterrupts().
cpu/simple/base.cc:
    Minor fix to interrupt check code.
dev/ide_disk.hh:
    Don't declare regStats() in header since it's not in
    .cc file anymore (will need to add it back in when
    stats are added back).
dev/io_device.cc:
    Set packet dest to Packet::Broadcast.
dev/pciconfigall.cc:
    Set PCI config packet result to Success.
python/m5/objects/Root.py:
    Add debug object to Root so things like break_cycles
    can be set from command line.

--HG--
extra : convert_revision : aa1c652fe589784e753e13ad9acb0cd5f3b6eafb
2006-05-17 22:08:44 -04:00
..
alpha_access.h Get rid of the xc from the alphaAccess/alphaConsole backdoor device. 2006-02-23 14:50:16 -05:00
alpha_console.cc Many files: 2006-05-15 20:30:20 -04:00
alpha_console.hh updates for newmem 2006-04-10 14:14:06 -04:00
baddev.cc fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
baddev.hh updates for newmem 2006-04-10 14:14:06 -04:00
disk_image.cc Many files: 2006-05-15 20:30:20 -04:00
disk_image.hh Many files: 2005-06-05 05:16:00 -04:00
etherbus.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherbus.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherdump.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherdump.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherint.cc Many files: 2005-06-05 05:16:00 -04:00
etherint.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherlink.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherlink.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherpkt.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
etherpkt.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
ethertap.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
ethertap.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
ide_atareg.h Fixes for cygwin compile. 2005-06-30 00:42:27 -04:00
ide_ctrl.cc ide printing to match newmem 2006-05-11 17:18:19 -04:00
ide_ctrl.hh make ide disk work for newmem 2006-04-20 17:14:30 -04:00
ide_disk.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
ide_disk.hh Get basic full-system working with AtomicSimpleCPU. 2006-05-17 22:08:44 -04:00
ide_wdcreg.h Fix doxgyen comments 2005-06-04 23:56:53 -04:00
io_device.cc Get basic full-system working with AtomicSimpleCPU. 2006-05-17 22:08:44 -04:00
io_device.hh move code from packet.hh to packet.cc and packet_impl.hh 2006-05-01 18:53:28 -04:00
isa_fake.cc devices should increment pkt.time instead of assiging to it 2006-04-28 15:38:43 -04:00
isa_fake.hh updates for newmem 2006-04-10 14:14:06 -04:00
ns_gige.cc Many files: 2006-05-15 20:30:20 -04:00
ns_gige.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
ns_gige_reg.h Ethernet devices have an RSS option to tell the driver to 2006-03-03 14:17:48 -05:00
pciconfigall.cc Get basic full-system working with AtomicSimpleCPU. 2006-05-17 22:08:44 -04:00
pciconfigall.hh make ide disk work for newmem 2006-04-20 17:14:30 -04:00
pcidev.cc Many files: 2006-05-15 20:06:42 -04:00
pcidev.hh make ide disk work for newmem 2006-04-20 17:14:30 -04:00
pcireg.h Changes for getting FreeBSD to run. 2005-08-15 16:59:58 -04:00
pitreg.h Changes for getting FreeBSD to run. 2005-08-15 16:59:58 -04:00
pktfifo.cc Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
pktfifo.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00
platform.cc fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
platform.hh fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
rtcreg.h Changes for getting FreeBSD to run. 2005-08-15 16:59:58 -04:00
simconsole.cc fixes for newmem 2006-04-06 14:57:51 -04:00
simconsole.hh Many files: 2005-06-05 05:16:00 -04:00
simple_disk.cc fixes for newmem 2006-04-06 14:57:51 -04:00
simple_disk.hh fixes for newmem 2006-04-06 14:57:51 -04:00
sinic.cc Many files: 2006-05-15 20:30:20 -04:00
sinic.hh Merge zeep.pool:/z/saidi/work/m5.head 2006-05-12 18:16:07 -04:00
sinicreg.hh Major update to sinic to support VSINIC better 2006-04-26 17:52:33 -04:00
tsunami.cc fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
tsunami.hh fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
tsunami_cchip.cc devices should increment pkt.time instead of assiging to it 2006-04-28 15:38:43 -04:00
tsunami_cchip.hh added unimp faults 2006-04-06 18:04:49 -04:00
tsunami_io.cc devices should increment pkt.time instead of assiging to it 2006-04-28 15:38:43 -04:00
tsunami_io.hh fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
tsunami_pchip.cc devices should increment pkt.time instead of assiging to it 2006-04-28 15:38:43 -04:00
tsunami_pchip.hh fullsys now builds and runs for about one cycle 2006-04-11 13:42:47 -04:00
tsunamireg.h Merge zed.eecs.umich.edu:/.automount/fox/y/mserrano/m5_dir/m5 2005-08-15 17:17:17 -04:00
uart.cc fixes for newmem 2006-04-06 14:57:51 -04:00
uart.hh fixes for newmem 2006-04-06 14:57:51 -04:00
uart8250.cc devices should increment pkt.time instead of assiging to it 2006-04-28 15:38:43 -04:00
uart8250.hh Mostly done with all device models for new memory system. Still need to get timing packets working and get sinic working 2006-04-24 19:31:50 -04:00