7b40c36fbd
Mostly just config.ini updates, though the different response latency for bad addresses caused very minor timing changes in the O3 Linux boot tests.
50 lines
4.5 KiB
Text
50 lines
4.5 KiB
Text
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---------- Begin Simulation Statistics ----------
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host_inst_rate 5366735 # Simulator instruction rate (inst/s)
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host_mem_usage 205860 # Number of bytes of host memory used
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host_seconds 16.46 # Real time elapsed on the host
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host_tick_rate 2686413423 # Simulator tick rate (ticks/s)
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sim_freq 1000000000000 # Frequency of simulated ticks
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sim_insts 88340673 # Number of instructions simulated
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sim_seconds 0.044221 # Number of seconds simulated
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sim_ticks 44221003000 # Number of ticks simulated
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system.cpu.dtb.data_accesses 34987415 # DTB accesses
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system.cpu.dtb.data_acv 0 # DTB access violations
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system.cpu.dtb.data_hits 34890015 # DTB hits
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system.cpu.dtb.data_misses 97400 # DTB misses
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system.cpu.dtb.fetch_accesses 0 # ITB accesses
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system.cpu.dtb.fetch_acv 0 # ITB acv
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system.cpu.dtb.fetch_hits 0 # ITB hits
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system.cpu.dtb.fetch_misses 0 # ITB misses
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system.cpu.dtb.read_accesses 20366786 # DTB read accesses
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system.cpu.dtb.read_acv 0 # DTB read access violations
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system.cpu.dtb.read_hits 20276638 # DTB read hits
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system.cpu.dtb.read_misses 90148 # DTB read misses
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system.cpu.dtb.write_accesses 14620629 # DTB write accesses
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system.cpu.dtb.write_acv 0 # DTB write access violations
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system.cpu.dtb.write_hits 14613377 # DTB write hits
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system.cpu.dtb.write_misses 7252 # DTB write misses
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system.cpu.idle_fraction 0 # Percentage of idle cycles
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system.cpu.itb.data_accesses 0 # DTB accesses
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system.cpu.itb.data_acv 0 # DTB access violations
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system.cpu.itb.data_hits 0 # DTB hits
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system.cpu.itb.data_misses 0 # DTB misses
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system.cpu.itb.fetch_accesses 88442007 # ITB accesses
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system.cpu.itb.fetch_acv 0 # ITB acv
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system.cpu.itb.fetch_hits 88438073 # ITB hits
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system.cpu.itb.fetch_misses 3934 # ITB misses
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system.cpu.itb.read_accesses 0 # DTB read accesses
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system.cpu.itb.read_acv 0 # DTB read access violations
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system.cpu.itb.read_hits 0 # DTB read hits
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system.cpu.itb.read_misses 0 # DTB read misses
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system.cpu.itb.write_accesses 0 # DTB write accesses
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system.cpu.itb.write_acv 0 # DTB write access violations
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system.cpu.itb.write_hits 0 # DTB write hits
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system.cpu.itb.write_misses 0 # DTB write misses
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system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
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system.cpu.numCycles 88442007 # number of cpu cycles simulated
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system.cpu.num_insts 88340673 # Number of instructions executed
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system.cpu.num_refs 35321418 # Number of memory references
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system.cpu.workload.PROG:num_syscalls 4583 # Number of system calls
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---------- End Simulation Statistics ----------
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