300 lines
10 KiB
C++
300 lines
10 KiB
C++
// -*- mode:c++ -*-
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// Copyright (c) 2003-2005 The Regents of The University of Michigan
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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output exec {{
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/// Check "FP enabled" machine status bit. Called when executing any FP
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/// instruction in full-system mode.
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/// @retval Full-system mode: NoFault if FP is enabled, FenFault
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/// if not. Non-full-system mode: always returns NoFault.
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#if FULL_SYSTEM
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inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
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{
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Fault fault = NoFault; // dummy... this ipr access should not fault
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if (!EV5::ICSR_FPE(xc->readIpr(AlphaISA::IPR_ICSR, fault))) {
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fault = FloatEnableFault;
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}
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return fault;
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}
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#else
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inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
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{
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return NoFault;
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}
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#endif
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}};
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output header {{
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/**
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* Base class for general floating-point instructions. Includes
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* support for various Alpha rounding and trapping modes. Only FP
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* instructions that require this support are derived from this
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* class; the rest derive directly from AlphaStaticInst.
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*/
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class AlphaFP : public AlphaStaticInst
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{
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public:
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/// Alpha FP rounding modes.
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enum RoundingMode {
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Chopped = 0, ///< round toward zero
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Minus_Infinity = 1, ///< round toward minus infinity
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Normal = 2, ///< round to nearest (default)
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Dynamic = 3, ///< use FPCR setting (in instruction)
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Plus_Infinity = 3 ///< round to plus inifinity (in FPCR)
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};
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/// Alpha FP trapping modes.
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/// For instructions that produce integer results, the
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/// "Underflow Enable" modes really mean "Overflow Enable", and
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/// the assembly modifier is V rather than U.
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enum TrappingMode {
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/// default: nothing enabled
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Imprecise = 0, ///< no modifier
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/// underflow/overflow traps enabled, inexact disabled
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Underflow_Imprecise = 1, ///< /U or /V
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Underflow_Precise = 5, ///< /SU or /SV
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/// underflow/overflow and inexact traps enabled
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Underflow_Inexact_Precise = 7 ///< /SUI or /SVI
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};
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protected:
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/// Map Alpha rounding mode to C99 constants from <fenv.h>.
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static const int alphaToC99RoundingMode[];
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/// Map enum RoundingMode values to disassembly suffixes.
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static const char *roundingModeSuffix[];
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/// Map enum TrappingMode values to FP disassembly suffixes.
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static const char *fpTrappingModeSuffix[];
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/// Map enum TrappingMode values to integer disassembly suffixes.
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static const char *intTrappingModeSuffix[];
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/// This instruction's rounding mode.
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RoundingMode roundingMode;
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/// This instruction's trapping mode.
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TrappingMode trappingMode;
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/// Have we warned about this instruction's unsupported
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/// rounding mode (if applicable)?
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mutable bool warnedOnRounding;
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/// Have we warned about this instruction's unsupported
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/// trapping mode (if applicable)?
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mutable bool warnedOnTrapping;
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/// Constructor
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AlphaFP(const char *mnem, MachInst _machInst, OpClass __opClass)
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: AlphaStaticInst(mnem, _machInst, __opClass),
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roundingMode((enum RoundingMode)FP_ROUNDMODE),
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trappingMode((enum TrappingMode)FP_TRAPMODE),
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warnedOnRounding(false),
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warnedOnTrapping(false)
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{
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}
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int getC99RoundingMode(uint64_t fpcr_val) const;
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// This differs from the AlphaStaticInst version only in
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// printing suffixes for non-default rounding & trapping modes.
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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}};
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output decoder {{
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int
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AlphaFP::getC99RoundingMode(uint64_t fpcr_val) const
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{
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if (roundingMode == Dynamic) {
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return alphaToC99RoundingMode[bits(fpcr_val, 59, 58)];
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}
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else {
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return alphaToC99RoundingMode[roundingMode];
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}
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}
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std::string
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AlphaFP::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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std::string mnem_str(mnemonic);
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#ifndef SS_COMPATIBLE_DISASSEMBLY
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std::string suffix("");
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suffix += ((_destRegIdx[0] >= FP_Base_DepTag)
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? fpTrappingModeSuffix[trappingMode]
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: intTrappingModeSuffix[trappingMode]);
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suffix += roundingModeSuffix[roundingMode];
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if (suffix != "") {
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mnem_str = csprintf("%s/%s", mnemonic, suffix);
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}
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#endif
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std::stringstream ss;
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ccprintf(ss, "%-10s ", mnem_str.c_str());
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// just print the first two source regs... if there's
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// a third one, it's a read-modify-write dest (Rc),
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// e.g. for CMOVxx
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if (_numSrcRegs > 0) {
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printReg(ss, _srcRegIdx[0]);
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}
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if (_numSrcRegs > 1) {
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ss << ",";
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printReg(ss, _srcRegIdx[1]);
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}
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// just print the first dest... if there's a second one,
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// it's generally implicit
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if (_numDestRegs > 0) {
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if (_numSrcRegs > 0)
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ss << ",";
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printReg(ss, _destRegIdx[0]);
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}
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return ss.str();
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}
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const int AlphaFP::alphaToC99RoundingMode[] = {
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FE_TOWARDZERO, // Chopped
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FE_DOWNWARD, // Minus_Infinity
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FE_TONEAREST, // Normal
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FE_UPWARD // Dynamic in inst, Plus_Infinity in FPCR
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};
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const char *AlphaFP::roundingModeSuffix[] = { "c", "m", "", "d" };
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// mark invalid trapping modes, but don't fail on them, because
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// you could decode anything on a misspeculated path
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const char *AlphaFP::fpTrappingModeSuffix[] =
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{ "", "u", "INVTM2", "INVTM3", "INVTM4", "su", "INVTM6", "sui" };
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const char *AlphaFP::intTrappingModeSuffix[] =
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{ "", "v", "INVTM2", "INVTM3", "INVTM4", "sv", "INVTM6", "svi" };
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}};
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// FP instruction class execute method template. Handles non-standard
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// rounding modes.
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def template FloatingPointExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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if (trappingMode != Imprecise && !warnedOnTrapping) {
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warn("%s: non-standard trapping mode not supported",
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generateDisassembly(0, NULL));
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warnedOnTrapping = true;
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}
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Fault fault = NoFault;
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%(fp_enable_check)s;
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%(op_decl)s;
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%(op_rd)s;
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#if USE_FENV
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if (roundingMode == Normal) {
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%(code)s;
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} else {
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fesetround(getC99RoundingMode(xc->readFpcr()));
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%(code)s;
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fesetround(FE_TONEAREST);
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}
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#else
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if (roundingMode != Normal && !warnedOnRounding) {
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warn("%s: non-standard rounding mode not supported",
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generateDisassembly(0, NULL));
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warnedOnRounding = true;
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}
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%(code)s;
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#endif
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if (fault == NoFault) {
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%(op_wb)s;
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}
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return fault;
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}
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}};
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// FP instruction class execute method template where no dynamic
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// rounding mode control is needed. Like BasicExecute, but includes
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// check & warning for non-standard trapping mode.
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def template FPFixedRoundingExecute {{
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Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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if (trappingMode != Imprecise && !warnedOnTrapping) {
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warn("%s: non-standard trapping mode not supported",
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generateDisassembly(0, NULL));
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warnedOnTrapping = true;
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}
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Fault fault = NoFault;
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%(fp_enable_check)s;
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%(op_decl)s;
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%(op_rd)s;
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%(code)s;
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if (fault == NoFault) {
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%(op_wb)s;
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}
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return fault;
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}
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}};
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def template FloatingPointDecode {{
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{
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AlphaStaticInst *i = new %(class_name)s(machInst);
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if (FC == 31) {
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i = makeNop(i);
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}
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return i;
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}
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}};
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// General format for floating-point operate instructions:
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// - Checks trapping and rounding mode flags. Trapping modes
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// currently unimplemented (will fail).
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// - Generates NOP if FC == 31.
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def format FloatingPointOperate(code, *opt_args) {{
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iop = InstObjParams(name, Name, 'AlphaFP', CodeBlock(code), opt_args)
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decode_block = FloatingPointDecode.subst(iop)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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exec_output = FloatingPointExecute.subst(iop)
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}};
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// Special format for cvttq where rounding mode is pre-decoded
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def format FPFixedRounding(code, class_suffix, *opt_args) {{
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Name += class_suffix
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iop = InstObjParams(name, Name, 'AlphaFP', CodeBlock(code), opt_args)
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decode_block = FloatingPointDecode.subst(iop)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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exec_output = FPFixedRoundingExecute.subst(iop)
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}};
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