759ff4b910
build/SConstruct:
Include Ozone CPU models.
cpu/cpu_models.py:
Include OzoneCPU models.
--HG--
extra : convert_revision : 51a016c216cacd2cc613eed79653026c2edda4b3
76 lines
2.2 KiB
C++
76 lines
2.2 KiB
C++
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#ifndef __CPU_OZONE_NULL_PREDICTOR_HH__
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#define __CPU_OZONE_NULL_PREDICTOR_HH__
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#include "arch/isa_traits.hh"
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#include "cpu/inst_seq.hh"
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template <class Impl>
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class NullPredictor
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{
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public:
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typedef typename Impl::Params Params;
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typedef typename Impl::DynInstPtr DynInstPtr;
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NullPredictor(Params *p) { }
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struct BPredInfo {
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BPredInfo()
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: PC(0), nextPC(0)
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{ }
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BPredInfo(const Addr &pc, const Addr &next_pc)
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: PC(pc), nextPC(next_pc)
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{ }
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Addr PC;
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Addr nextPC;
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};
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BPredInfo lookup(Addr &PC) { return BPredInfo(PC, PC+4); }
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void undo(BPredInfo &bp_info) { return; }
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/**
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* Predicts whether or not the instruction is a taken branch, and the
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* target of the branch if it is taken.
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* @param inst The branch instruction.
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* @param PC The predicted PC is passed back through this parameter.
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* @param tid The thread id.
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* @return Returns if the branch is taken or not.
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*/
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bool predict(DynInstPtr &inst, Addr &PC, unsigned tid)
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{ return false; }
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/**
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* Tells the branch predictor to commit any updates until the given
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* sequence number.
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* @param done_sn The sequence number to commit any older updates up until.
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* @param tid The thread id.
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*/
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void update(const InstSeqNum &done_sn, unsigned tid) { }
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/**
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* Squashes all outstanding updates until a given sequence number.
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* @param squashed_sn The sequence number to squash any younger updates up
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* until.
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* @param tid The thread id.
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*/
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void squash(const InstSeqNum &squashed_sn, unsigned tid) { }
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/**
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* Squashes all outstanding updates until a given sequence number, and
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* corrects that sn's update with the proper address and taken/not taken.
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* @param squashed_sn The sequence number to squash any younger updates up
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* until.
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* @param corr_target The correct branch target.
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* @param actually_taken The correct branch direction.
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* @param tid The thread id.
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*/
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void squash(const InstSeqNum &squashed_sn, const Addr &corr_target,
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bool actually_taken, unsigned tid)
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{ }
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};
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#endif // __CPU_OZONE_NULL_PREDICTOR_HH__
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