Andreas Hansson 8909843a76 stats: Update stats to reflect cache and interconnect changes ... This is a bulk update of stats to match the changes to cache timing, interconnect timing, and a few minor changes to the o3 CPU.		2015-03-02 05:04:20 -05:00
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config.ini	stats: updates due to changes to x86, stale configs.	2014-10-11 16:18:51 -05:00
simerr	tests: Reflect name change in DRAM tests	2014-05-09 18:58:49 -04:00
simout	tests: Reflect name change in DRAM tests	2014-05-09 18:58:49 -04:00
stats.txt	stats: Update stats to reflect cache and interconnect changes	2015-03-02 05:04:20 -05:00