gem5/src/arch
2009-08-05 02:57:47 -07:00
..
alpha Alpha: Missed a file in an earlier changeset. 2009-07-09 00:20:41 -07:00
arm Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
mips merge mips fix and statetrace changes 2009-07-31 10:40:42 -04:00
sparc Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
x86 X86: Fix sign extension when doing an arithmetic shift right by 0. 2009-08-05 02:57:47 -07:00
isa_parser.py isa_parser: Get rid of the now unused ControlBitfieldOperand. 2009-07-20 20:20:17 -07:00
isa_specific.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
micro_asm.py Microcode: Fix a silent typo error in the microcode assembler. 2008-10-09 00:07:38 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00