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gem5/tests/configs
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Nilay Vaish 7e27860ef4 ruby: route all packets through ruby port 
Currently, the interrupt controller in x86 is connected to the io bus
directly.  Therefore the packets between the io devices and the interrupt
controller do not go through ruby.  This patch changes ruby port so that
these packets arrive at the ruby port first, which then routes them to their
destination.  Note that the patch does not make these packets go through the
ruby network.  That would happen in a subsequent patch.
2014-02-23 19:16:16 -06:00
..
alpha_generic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
arm_generic.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
base_config.py mem: Change AbstractMemory defaults to match the common case 2013-08-19 03:52:33 -04:00
inorder-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
memtest-ruby.py ruby: add option for number of transitions per cycle 2013-08-20 11:32:31 -05:00
memtest.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
o3-timing-checker.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
o3-timing-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
o3-timing-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
o3-timing-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
o3-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
pc-o3-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
pc-simple-atomic.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
pc-simple-timing-ruby.py ruby: route all packets through ruby port 2014-02-23 19:16:16 -06:00
pc-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
pc-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3-checker.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-atomic-dual.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
realview-simple-atomic.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
realview-simple-timing-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-atomic.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
realview-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
realview-switcheroo-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
rubytest-ruby.py ruby: add option for number of transitions per cycle 2013-08-20 11:32:31 -05:00
simple-atomic-dummychecker.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-atomic-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
simple-atomic-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-atomic.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-timing-mp-ruby.py sim: Add the notion of clock domains to all ClockedObjects 2013-06-27 05:49:49 -04:00
simple-timing-mp.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
simple-timing-ruby.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
simple-timing.py config: Add a BaseSESystem builder for re-use in regressions 2013-06-27 05:49:49 -04:00
switcheroo.py tests: suppress output on switcheroo tests 2013-11-14 15:03:42 -08:00
t1000-simple-atomic.py mem: Change AbstractMemory defaults to match the common case 2013-08-19 03:52:33 -04:00
tgen-simple-dram.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
tgen-simple-mem.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
tsunami-inorder.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-o3-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-o3.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-atomic-dual.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
tsunami-simple-atomic.py test: Use SimpleMemory for atomic full-system tests 2013-11-01 11:56:14 -04:00
tsunami-simple-timing-dual.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-simple-timing.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
tsunami-switcheroo-full.py config: Move the memory instantiation outside FSConfig 2013-08-19 03:52:27 -04:00
twosys-tsunami-simple-atomic.py power: Add voltage domains to the clock domains 2013-08-19 03:52:28 -04:00
x86_generic.py config, x86: move kernel specification from tests to FSConfig.py 2014-01-03 17:08:44 -08:00