006818aeea
add a couple of helper functions to base for deleteing all pointers in a container and outputting containers to a stream
97 lines
3.4 KiB
C++
97 lines
3.4 KiB
C++
/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* The actual modelled switch. It use the perfect switch and a
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* Throttle object to control and bandwidth and timing *only for the
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* output port*. So here we have un-realistic modelling, since the
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* order of PerfectSwitch and Throttle objects get woke up affect the
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* message timing. A more accurate model would be having two set of
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* system states, one for this cycle, one for next cycle. And on the
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* cycle boundary swap the two set of states.
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*/
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#ifndef __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__
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#define __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__
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#include <iostream>
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#include <vector>
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#include "mem/ruby/common/Global.hh"
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class MessageBuffer;
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class PerfectSwitch;
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class NetDest;
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class SimpleNetwork;
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class Throttle;
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class Network;
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class Switch
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{
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public:
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Switch(SwitchID sid, SimpleNetwork* network_ptr);
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~Switch();
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void addInPort(const std::vector<MessageBuffer*>& in);
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void addOutPort(const std::vector<MessageBuffer*>& out,
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const NetDest& routing_table_entry, int link_latency,
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int bw_multiplier);
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const Throttle* getThrottle(LinkID link_number) const;
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const std::vector<Throttle*>* getThrottles() const;
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void clearRoutingTables();
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void clearBuffers();
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void reconfigureOutPort(const NetDest& routing_table_entry);
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void printStats(std::ostream& out) const;
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void clearStats();
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void printConfig(std::ostream& out) const;
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void print(std::ostream& out) const;
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private:
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// Private copy constructor and assignment operator
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Switch(const Switch& obj);
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Switch& operator=(const Switch& obj);
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PerfectSwitch* m_perfect_switch_ptr;
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Network* m_network_ptr;
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std::vector<Throttle*> m_throttles;
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std::vector<MessageBuffer*> m_buffers_to_free;
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SwitchID m_switch_id;
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};
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inline std::ostream&
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operator<<(std::ostream& out, const Switch& obj)
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{
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obj.print(out);
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out << std::flush;
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return out;
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}
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#endif // __MEM_RUBY_NETWORK_SIMPLE_SWITCH_HH__
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