3d93afe348
Regression tester updates required by the following patches: brad/moved_python_protocol_files: config: moved python protocol config files brad/ruby_options_movement: config: reorganized how ruby specifies command-line options brad/config_token_bcast: ruby: added token broadcast config params to cmd options brad/topology_name: config: Added the topology description to m5 config.ini brad/ruby_system_names: config: Improve ruby simobject names brad/consolidated_protocol_stats: slicc: Consolidated the protocol stats printing brad/ruby_request_type_ostream_fix: ruby: Added ruby_request_type ostream def to libruby.hh brad/memtest_dma_extension: memtest: Memtester support for DMA brad/token_dma_lockdown_fix: MOESI_CMP_token: Fixed dma persistent lockdown bugs brad/profile_generic_mach_type: ruby: Reincarnated the responding machine profiling brad/network_msg_consolidated_stats: ruby: Added consolidated network msg stats brad/bcast_msg_profiling: ruby: Added bcast msg profiling to hammer and token brad/l2cache_profiling_fix: ruby: Fixed L2 cache miss profiling brad/llsc_ruby_m5_fix: ruby: fix ruby llsc support to sync sc outcomes brad/ruby_latency_fixes: ruby: Reduced ruby latencies brad/hammer_l2_cache_latency: ruby: Updated MOESI_hammer L2 latency behavior brad/deterministic_resurrection: ruby: Resurrected Ruby's deterministic tests brad/token_dma_fixes: ruby: MOESI_CMP_token dma fixes brad/ruby_cmd_options: config: added cmd options to control ruby debug brad/token_owner_fixes: ruby: fixed token bugs associated with owner token counts brad/ruby_remove_try_except: ruby: Improved try except blocks in ruby creation brad/ruby_port_callback_fix: ruby: Fixed RubyPort sendTiming callbacks brad/interrupt_drain_fix: devices: Fixed periodic interrupts to work with draining brad/llsc_trace_profile: ruby: Added SC fail indication to trace profiling brad/no_migrate_atomic: ruby: Disable migratory sharing for token and hammer brad/ruby_start_time_fix: ruby: Reset ruby stats in RubySystem unserialize brad/numa_bit_select_fix: ruby: fixed DirectoryMemory's numa_high_bit configuration brad/hammer_probe_filter: ruby: added probe filter support to hammer brad/miss_latency_detail_profile: MOESI_hammer: break down miss latency stalled cycles brad/recycle_latency_fix: ruby: Recycle latency fix for hammer brad/stall_and_wait: ruby: Stall and wait input messages instead of recycling brad/rubytest_request_flag_fix: ruby: Fixed minor bug in ruby test for setting the request type brad/hammer_merge_gets: ruby: Added merge GETS optimization to hammer brad/regress_updates: regress: Regression tester updates
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, ordered
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virtual_net_1: active, ordered
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virtual_net_2: active, ordered
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virtual_net_3: active, ordered
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virtual_net_4: active, ordered
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virtual_net_5: inactive
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: Aug/20/2010 13:39:31
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 69
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Elapsed_time_in_minutes: 1.15
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Elapsed_time_in_hours: 0.0191667
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Elapsed_time_in_days: 0.000798611
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Virtual_time_in_seconds: 68.75
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Virtual_time_in_minutes: 1.14583
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Virtual_time_in_hours: 0.0190972
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Virtual_time_in_days: 0.000795718
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Ruby_current_time: 11059012
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Ruby_start_time: 0
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Ruby_cycles: 11059012
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mbytes_resident: 32.25
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mbytes_total: 333.105
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resident_ratio: 0.0968279
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ruby_cycles_executed: [ 11059013 11059013 11059013 11059013 11059013 11059013 11059013 11059013 ]
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Busy Controller Counts:
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L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 2 count: 1228772 average: 1.9375 | standard deviation: 0.242071 | 0 76804 1151968 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 4 max: 548 count: 1228757 average: 141.941 | standard deviation: 1.79768 | 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21 272 4811 76194 1147428 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 4 max: 548 count: 798474 average: 141.942 | standard deviation: 1.87927 | 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18 174 3144 49367 745750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 4 max: 459 count: 430283 average: 141.94 | standard deviation: 1.63553 | 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 98 1667 26827 401678 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 3 count: 14 average: 3 | standard deviation: 0 | 0 0 0 14 ]
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miss_latency_Directory: [binsize: 2 max: 359 count: 2 average: 304 | standard deviation: 77.7817 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_L1Cache_wCC: [binsize: 4 max: 548 count: 1228741 average: 141.942 | standard deviation: 1.72165 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21 272 4811 76194 1147428 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 6 average: 0 | standard deviation: 0 | 6 ]
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miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 6 average: 0 | standard deviation: 0 | 6 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 6 average: 0 | standard deviation: 0 | 6 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 4 max: 495 count: 6 average: 412.667 | standard deviation: 76.4147 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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imcomplete_wCC_Times: 1228735
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miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 2 average: 0 | standard deviation: 0 | 2 ]
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miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 2 average: 0 | standard deviation: 0 | 2 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 2 average: 0 | standard deviation: 0 | 2 ]
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miss_latency_dir_first_response_to_completion: [binsize: 2 max: 359 count: 2 average: 304 | standard deviation: 77.7817 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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imcomplete_dir_Times: 0
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miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 7 average: 3 | standard deviation: 0 | 0 0 0 7 ]
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miss_latency_LD_Directory: [binsize: 2 max: 359 count: 2 average: 304 | standard deviation: 77.7817 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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miss_latency_LD_L1Cache_wCC: [binsize: 4 max: 548 count: 798465 average: 141.943 | standard deviation: 1.81358 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18 174 3144 49367 745750 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 7 average: 3 | standard deviation: 0 | 0 0 0 7 ]
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miss_latency_ST_L1Cache_wCC: [binsize: 4 max: 459 count: 430276 average: 141.942 | standard deviation: 1.53653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 98 1667 26827 401678 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 4 max: 151 count: 2457486 average: 47.4696 | standard deviation: 47.4806 | 1228745 0 0 0 1 0 0 1 0 0 0 1 0 0 0 2 0 0 0 7 145 2397 38169 611708 576306 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
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Total_nonPF_delay_cycles: [binsize: 4 max: 151 count: 2457486 average: 47.4696 | standard deviation: 47.4806 | 1228745 0 0 0 1 0 0 1 0 0 0 1 0 0 0 2 0 0 0 7 145 2397 38169 611708 576306 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 1228743 average: 0 | standard deviation: 0 | 1228743 ]
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virtual_network_2_delay_cycles: [binsize: 4 max: 151 count: 1228743 average: 94.9391 | standard deviation: 1.44451 | 2 0 0 0 1 0 0 1 0 0 0 1 0 0 0 2 0 0 0 7 145 2397 38169 611708 576306 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 68
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system_time: 0
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page_reclaims: 9322
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page_faults: 0
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swaps: 0
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block_inputs: 0
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block_outputs: 0
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Network Stats
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-------------
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total_msg_count_Control: 3686271 29490168
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total_msg_count_Response_Data: 3686229 265408488
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total_msg_count_Writeback_Control: 3686259 29490072
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total_msgs: 11058759 total_bytes: 324388728
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 0.434016
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links_utilized_percent_switch_0_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 0.694426 bw: 160000 base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Control: 153595 1228760 [ 0 0 153595 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 0.434016
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links_utilized_percent_switch_1_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 0.694426 bw: 160000 base_latency: 1
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outgoing_messages_switch_1_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Control: 153595 1228760 [ 0 0 153595 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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links_utilized_percent_switch_2: 0.434016
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links_utilized_percent_switch_2_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 0.694426 bw: 160000 base_latency: 1
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outgoing_messages_switch_2_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Control: 153595 1228760 [ 0 0 0 153595 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Control: 153595 1228760 [ 0 0 153595 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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switch_3_inlinks: 2
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switch_3_outlinks: 2
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links_utilized_percent_switch_3: 0.434016
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links_utilized_percent_switch_3_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_3_link_1: 0.694426 bw: 160000 base_latency: 1
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outgoing_messages_switch_3_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Control: 153595 1228760 [ 0 0 153595 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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switch_4_inlinks: 2
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switch_4_outlinks: 2
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links_utilized_percent_switch_4: 0.434014
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links_utilized_percent_switch_4_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_4_link_1: 0.694421 bw: 160000 base_latency: 1
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outgoing_messages_switch_4_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_Control: 153594 1228752 [ 0 0 153594 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_4_link_1_Response_Data: 153592 11058624 [ 0 0 0 0 153592 0 0 0 0 0 ] base_latency: 1
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switch_5_inlinks: 2
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switch_5_outlinks: 2
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links_utilized_percent_switch_5: 0.434016
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links_utilized_percent_switch_5_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_5_link_1: 0.694426 bw: 160000 base_latency: 1
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outgoing_messages_switch_5_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_Control: 153595 1228760 [ 0 0 153595 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_5_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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switch_6_inlinks: 2
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switch_6_outlinks: 2
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links_utilized_percent_switch_6: 0.434014
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links_utilized_percent_switch_6_link_0: 0.173606 bw: 640000 base_latency: 1
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links_utilized_percent_switch_6_link_1: 0.694421 bw: 160000 base_latency: 1
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outgoing_messages_switch_6_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_Control: 153594 1228752 [ 0 0 153594 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_6_link_1_Response_Data: 153592 11058624 [ 0 0 0 0 153592 0 0 0 0 0 ] base_latency: 1
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switch_7_inlinks: 2
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switch_7_outlinks: 2
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links_utilized_percent_switch_7: 0.434013
|
|
links_utilized_percent_switch_7_link_0: 0.173605 bw: 640000 base_latency: 1
|
|
links_utilized_percent_switch_7_link_1: 0.694421 bw: 160000 base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Response_Data: 153592 11058624 [ 0 0 0 0 153592 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Control: 153594 1228752 [ 0 0 153594 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Response_Data: 153592 11058624 [ 0 0 0 0 153592 0 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_8_inlinks: 2
|
|
switch_8_outlinks: 2
|
|
links_utilized_percent_switch_8: 0.347219
|
|
links_utilized_percent_switch_8_link_0: 0.138886 bw: 640000 base_latency: 1
|
|
links_utilized_percent_switch_8_link_1: 0.555552 bw: 160000 base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Control: 1228757 9830056 [ 0 0 1228757 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Response_Data: 2 144 [ 0 0 0 0 2 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Writeback_Control: 1228753 9830024 [ 0 0 0 1228753 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_9_inlinks: 9
|
|
switch_9_outlinks: 9
|
|
links_utilized_percent_switch_9: 0.678994
|
|
links_utilized_percent_switch_9_link_0: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_1: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_2: 0.694426 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_3: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_4: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_5: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_6: 0.694425 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_7: 0.694421 bw: 160000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_8: 0.555546 bw: 160000 base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Writeback_Control: 153595 1228760 [ 0 0 0 153595 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Response_Data: 153593 11058696 [ 0 0 0 0 153593 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Response_Data: 153592 11058624 [ 0 0 0 0 153592 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Writeback_Control: 153594 1228752 [ 0 0 0 153594 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Control: 1228757 9830056 [ 0 0 1228757 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
Cache Stats: system.l1_cntrl0.cacheMemory
|
|
system.l1_cntrl0.cacheMemory_total_misses: 153595
|
|
system.l1_cntrl0.cacheMemory_total_demand_misses: 153595
|
|
system.l1_cntrl0.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl0.cacheMemory_request_type_LD: 64.8608%
|
|
system.l1_cntrl0.cacheMemory_request_type_ST: 35.1392%
|
|
|
|
system.l1_cntrl0.cacheMemory_access_mode_type_SupervisorMode: 153595 100%
|
|
|
|
--- L1Cache ---
|
|
- Event Counts -
|
|
Load [100001 99948 99718 99978 99623 99719 99984 99512 ] 798483
|
|
Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
Store [53593 53647 53876 53616 53974 53880 53619 54083 ] 430288
|
|
Data [153593 153593 153593 153592 153593 153593 153593 153593 ] 1228743
|
|
Fwd_GETX [153593 153593 153593 153592 153593 153593 153593 153593 ] 1228743
|
|
Inv [0 0 0 0 0 0 0 0 ] 0
|
|
Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
- Transitions -
|
|
I Load [100001 99948 99718 99978 99623 99718 99978 99512 ] 798476
|
|
I Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
I Store [53593 53647 53876 53616 53972 53877 53617 54083 ] 430281
|
|
I Inv [0 0 0 0 0 0 0 0 ] 0
|
|
I Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M Load [0 0 0 0 0 1 6 0 ] 7
|
|
M Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
M Store [0 0 0 0 2 3 2 0 ] 7
|
|
M Fwd_GETX [153593 153593 153593 153592 153593 153593 153593 153593 ] 1228743
|
|
M Inv [0 0 0 0 0 0 0 0 ] 0
|
|
M Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI Fwd_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
MI Inv [0 0 0 0 0 0 0 0 ] 0
|
|
MI Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MI Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MII Fwd_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS Data [100000 99946 99718 99976 99622 99716 99977 99512 ] 798467
|
|
|
|
IM Data [53593 53647 53875 53616 53971 53877 53616 54081 ] 430276
|
|
|
|
Cache Stats: system.l1_cntrl1.cacheMemory
|
|
system.l1_cntrl1.cacheMemory_total_misses: 153595
|
|
system.l1_cntrl1.cacheMemory_total_demand_misses: 153595
|
|
system.l1_cntrl1.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl1.cacheMemory_request_type_LD: 64.9227%
|
|
system.l1_cntrl1.cacheMemory_request_type_ST: 35.0773%
|
|
|
|
system.l1_cntrl1.cacheMemory_access_mode_type_SupervisorMode: 153595 100%
|
|
|
|
Cache Stats: system.l1_cntrl2.cacheMemory
|
|
system.l1_cntrl2.cacheMemory_total_misses: 153595
|
|
system.l1_cntrl2.cacheMemory_total_demand_misses: 153595
|
|
system.l1_cntrl2.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl2.cacheMemory_request_type_LD: 65.092%
|
|
system.l1_cntrl2.cacheMemory_request_type_ST: 34.908%
|
|
|
|
system.l1_cntrl2.cacheMemory_access_mode_type_SupervisorMode: 153595 100%
|
|
|
|
Cache Stats: system.l1_cntrl3.cacheMemory
|
|
system.l1_cntrl3.cacheMemory_total_misses: 153595
|
|
system.l1_cntrl3.cacheMemory_total_demand_misses: 153595
|
|
system.l1_cntrl3.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl3.cacheMemory_request_type_LD: 64.7886%
|
|
system.l1_cntrl3.cacheMemory_request_type_ST: 35.2114%
|
|
|
|
system.l1_cntrl3.cacheMemory_access_mode_type_SupervisorMode: 153595 100%
|
|
|
|
Cache Stats: system.l1_cntrl4.cacheMemory
|
|
system.l1_cntrl4.cacheMemory_total_misses: 153594
|
|
system.l1_cntrl4.cacheMemory_total_demand_misses: 153594
|
|
system.l1_cntrl4.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl4.cacheMemory_request_type_LD: 65.1074%
|
|
system.l1_cntrl4.cacheMemory_request_type_ST: 34.8926%
|
|
|
|
system.l1_cntrl4.cacheMemory_access_mode_type_SupervisorMode: 153594 100%
|
|
|
|
Cache Stats: system.l1_cntrl5.cacheMemory
|
|
system.l1_cntrl5.cacheMemory_total_misses: 153595
|
|
system.l1_cntrl5.cacheMemory_total_demand_misses: 153595
|
|
system.l1_cntrl5.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl5.cacheMemory_request_type_LD: 65.0724%
|
|
system.l1_cntrl5.cacheMemory_request_type_ST: 34.9276%
|
|
|
|
system.l1_cntrl5.cacheMemory_access_mode_type_SupervisorMode: 153595 100%
|
|
|
|
Cache Stats: system.l1_cntrl6.cacheMemory
|
|
system.l1_cntrl6.cacheMemory_total_misses: 153594
|
|
system.l1_cntrl6.cacheMemory_total_demand_misses: 153594
|
|
system.l1_cntrl6.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl6.cacheMemory_request_type_LD: 64.9231%
|
|
system.l1_cntrl6.cacheMemory_request_type_ST: 35.0769%
|
|
|
|
system.l1_cntrl6.cacheMemory_access_mode_type_SupervisorMode: 153594 100%
|
|
|
|
Cache Stats: system.l1_cntrl7.cacheMemory
|
|
system.l1_cntrl7.cacheMemory_total_misses: 153594
|
|
system.l1_cntrl7.cacheMemory_total_demand_misses: 153594
|
|
system.l1_cntrl7.cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl7.cacheMemory_request_type_LD: 65.0924%
|
|
system.l1_cntrl7.cacheMemory_request_type_ST: 34.9076%
|
|
|
|
system.l1_cntrl7.cacheMemory_access_mode_type_SupervisorMode: 153594 100%
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
|
memory_total_requests: 2
|
|
memory_reads: 2
|
|
memory_writes: 0
|
|
memory_refreshes: 22
|
|
memory_total_request_delays: 31
|
|
memory_delays_per_request: 15.5
|
|
memory_delays_in_input_queue: 1
|
|
memory_delays_behind_head_of_bank_queue: 10
|
|
memory_delays_stalled_at_head_of_bank_queue: 20
|
|
memory_stalls_for_bank_busy: 20
|
|
memory_stalls_for_random_busy: 0
|
|
memory_stalls_for_anti_starvation: 0
|
|
memory_stalls_for_arbitration: 0
|
|
memory_stalls_for_bus: 0
|
|
memory_stalls_for_tfaw: 0
|
|
memory_stalls_for_read_write_turnaround: 0
|
|
memory_stalls_for_read_read_turnaround: 0
|
|
accesses_per_bank: 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
|
|
|
|
--- Directory ---
|
|
- Event Counts -
|
|
GETX [1229168 ] 1229168
|
|
GETS [0 ] 0
|
|
PUTX [0 ] 0
|
|
PUTX_NotOwner [0 ] 0
|
|
DMA_READ [0 ] 0
|
|
DMA_WRITE [0 ] 0
|
|
Memory_Data [2 ] 2
|
|
Memory_Ack [0 ] 0
|
|
|
|
- Transitions -
|
|
I GETX [2 ] 2
|
|
I PUTX_NotOwner [0 ] 0
|
|
I DMA_READ [0 ] 0
|
|
I DMA_WRITE [0 ] 0
|
|
|
|
M GETX [1228755 ] 1228755
|
|
M PUTX [0 ] 0
|
|
M PUTX_NotOwner [0 ] 0
|
|
M DMA_READ [0 ] 0
|
|
M DMA_WRITE [0 ] 0
|
|
|
|
M_DRD GETX [0 ] 0
|
|
M_DRD PUTX [0 ] 0
|
|
|
|
M_DWR GETX [0 ] 0
|
|
M_DWR PUTX [0 ] 0
|
|
|
|
M_DWRI GETX [0 ] 0
|
|
M_DWRI Memory_Ack [0 ] 0
|
|
|
|
M_DRDI GETX [0 ] 0
|
|
M_DRDI Memory_Ack [0 ] 0
|
|
|
|
IM GETX [411 ] 411
|
|
IM GETS [0 ] 0
|
|
IM PUTX [0 ] 0
|
|
IM PUTX_NotOwner [0 ] 0
|
|
IM DMA_READ [0 ] 0
|
|
IM DMA_WRITE [0 ] 0
|
|
IM Memory_Data [2 ] 2
|
|
|
|
MI GETX [0 ] 0
|
|
MI GETS [0 ] 0
|
|
MI PUTX [0 ] 0
|
|
MI PUTX_NotOwner [0 ] 0
|
|
MI DMA_READ [0 ] 0
|
|
MI DMA_WRITE [0 ] 0
|
|
MI Memory_Ack [0 ] 0
|
|
|
|
ID GETX [0 ] 0
|
|
ID GETS [0 ] 0
|
|
ID PUTX [0 ] 0
|
|
ID PUTX_NotOwner [0 ] 0
|
|
ID DMA_READ [0 ] 0
|
|
ID DMA_WRITE [0 ] 0
|
|
ID Memory_Data [0 ] 0
|
|
|
|
ID_W GETX [0 ] 0
|
|
ID_W GETS [0 ] 0
|
|
ID_W PUTX [0 ] 0
|
|
ID_W PUTX_NotOwner [0 ] 0
|
|
ID_W DMA_READ [0 ] 0
|
|
ID_W DMA_WRITE [0 ] 0
|
|
ID_W Memory_Ack |