780aa0a0eb
I need to move over to using the fixPacket function so I don't have to make the same changes everywhere.
Still a functional access bug someplace I need to track down in timing mode.
src/mem/cache/base_cache.cc:
src/mem/cache/cache_impl.hh:
Fix corner case on assertion
tests/configs/memtest.py:
Updated memtester with uncacheable addresses and functional accesses
--HG--
extra : convert_revision : e6fa851621700ff9227b83cc5cac20af4fc8444f
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|---|---|---|
| .. | ||
| memtest.py | ||
| o3-timing-mp.py | ||
| o3-timing.py | ||
| simple-atomic-mp.py | ||
| simple-atomic.py | ||
| simple-timing-mp.py | ||
| simple-timing.py | ||
| tsunami-simple-atomic-dual.py | ||
| tsunami-simple-atomic.py | ||
| tsunami-simple-timing-dual.py | ||
| tsunami-simple-timing.py | ||