72538294fb
This patch cleans up a number of minor issues aiming to get closer to compliance with the C++0x standard as interpreted by gcc and clang (compile with std=c++0x and -pedantic-errors). In particular, the patch cleans up enums where the last item was succeded by a comma, namespaces closed by a curcly brace followed by a semi-colon, and the use of the GNU-extension typeof (replaced by templated functions). It does not address variable-length arrays, zero-size arrays, anonymous structs, range expressions in switch statements, and the use of long long. The generated CPU code also has a large number of issues that remain to be fixed, mainly related to overflows in implicit constant conversion (due to shifts).
424 lines
13 KiB
C++
424 lines
13 KiB
C++
/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_X86_FAULTS_HH__
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#define __ARCH_X86_FAULTS_HH__
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#include <string>
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#include "base/bitunion.hh"
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#include "base/misc.hh"
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#include "sim/faults.hh"
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#include "sim/tlb.hh"
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namespace X86ISA
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{
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// Base class for all x86 "faults" where faults is in the m5 sense
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class X86FaultBase : public FaultBase
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{
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protected:
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const char * faultName;
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const char * mnem;
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uint8_t vector;
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uint64_t errorCode;
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X86FaultBase(const char * _faultName, const char * _mnem,
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const uint8_t _vector, uint64_t _errorCode = (uint64_t)-1)
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: faultName(_faultName), mnem(_mnem),
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vector(_vector), errorCode(_errorCode)
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{
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}
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const char * name() const
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{
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return faultName;
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}
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virtual bool isBenign()
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{
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return true;
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}
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virtual const char * mnemonic() const
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{
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return mnem;
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}
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virtual bool isSoft()
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{
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return false;
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}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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virtual std::string describe() const;
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};
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// Base class for x86 faults which behave as if the underlying instruction
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// didn't happen.
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class X86Fault : public X86FaultBase
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{
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protected:
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X86Fault(const char * name, const char * mnem,
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const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
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: X86FaultBase(name, mnem, vector, _errorCode)
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{}
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};
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// Base class for x86 traps which behave as if the underlying instruction
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// completed.
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class X86Trap : public X86FaultBase
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{
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protected:
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X86Trap(const char * name, const char * mnem,
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const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
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: X86FaultBase(name, mnem, vector, _errorCode)
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{}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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};
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// Base class for x86 aborts which seem to be catastrophic failures.
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class X86Abort : public X86FaultBase
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{
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protected:
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X86Abort(const char * name, const char * mnem,
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const uint8_t vector, uint64_t _errorCode = (uint64_t)-1)
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: X86FaultBase(name, mnem, vector, _errorCode)
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{}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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};
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// Base class for x86 interrupts.
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class X86Interrupt : public X86FaultBase
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{
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protected:
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X86Interrupt(const char * name, const char * mnem,
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const uint8_t _vector, uint64_t _errorCode = (uint64_t)-1)
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: X86FaultBase(name, mnem, _vector, _errorCode)
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{}
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};
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class UnimpInstFault : public FaultBase
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{
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public:
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const char * name() const
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{
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return "unimplemented_micro";
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}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr)
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{
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panic("Unimplemented instruction!");
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}
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};
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// Below is a summary of the interrupt/exception information in the
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// architecture manuals.
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// Class | Type | vector | Cause | mnem
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//------------------------------------------------------------------------
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//Contrib Fault 0 Divide-by-Zero-Error #DE
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//Benign Either 1 Debug #DB
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//Benign Interrupt 2 Non-Maskable-Interrupt #NMI
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//Benign Trap 3 Breakpoint #BP
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//Benign Trap 4 Overflow #OF
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//Benign Fault 5 Bound-Range #BR
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//Benign Fault 6 Invalid-Opcode #UD
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//Benign Fault 7 Device-Not-Available #NM
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//Benign Abort 8 Double-Fault #DF
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// 9 Coprocessor-Segment-Overrun
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//Contrib Fault 10 Invalid-TSS #TS
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//Contrib Fault 11 Segment-Not-Present #NP
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//Contrib Fault 12 Stack #SS
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//Contrib Fault 13 General-Protection #GP
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//Either Fault 14 Page-Fault #PF
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// 15 Reserved
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//Benign Fault 16 x87 Floating-Point Exception Pending #MF
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//Benign Fault 17 Alignment-Check #AC
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//Benign Abort 18 Machine-Check #MC
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//Benign Fault 19 SIMD Floating-Point #XF
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// 20-29 Reserved
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//Contrib ? 30 Security Exception #SX
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// 31 Reserved
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//Benign Interrupt 0-255 External Interrupts #INTR
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//Benign Interrupt 0-255 Software Interrupts INTn
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class DivideByZero : public X86Fault
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{
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public:
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DivideByZero() :
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X86Fault("Divide-by-Zero-Error", "#DE", 0)
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{}
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};
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class DebugException : public X86FaultBase
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{
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public:
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DebugException() :
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X86FaultBase("Debug", "#DB", 1)
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{}
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};
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class NonMaskableInterrupt : public X86Interrupt
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{
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public:
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NonMaskableInterrupt(uint8_t _vector) :
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X86Interrupt("Non Maskable Interrupt", "#NMI", 2, _vector)
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{}
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};
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class Breakpoint : public X86Trap
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{
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public:
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Breakpoint() :
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X86Trap("Breakpoint", "#BP", 3)
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{}
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};
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class OverflowTrap : public X86Trap
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{
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public:
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OverflowTrap() :
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X86Trap("Overflow", "#OF", 4)
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{}
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};
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class BoundRange : public X86Fault
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{
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public:
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BoundRange() :
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X86Fault("Bound-Range", "#BR", 5)
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{}
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};
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class InvalidOpcode : public X86Fault
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{
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public:
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InvalidOpcode() :
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X86Fault("Invalid-Opcode", "#UD", 6)
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{}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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};
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class DeviceNotAvailable : public X86Fault
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{
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public:
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DeviceNotAvailable() :
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X86Fault("Device-Not-Available", "#NM", 7)
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{}
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};
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class DoubleFault : public X86Abort
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{
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public:
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DoubleFault() :
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X86Abort("Double-Fault", "#DF", 8, 0)
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{}
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};
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class InvalidTSS : public X86Fault
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{
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public:
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InvalidTSS(uint32_t _errorCode) :
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X86Fault("Invalid-TSS", "#TS", 10, _errorCode)
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{}
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};
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class SegmentNotPresent : public X86Fault
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{
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public:
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SegmentNotPresent(uint32_t _errorCode) :
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X86Fault("Segment-Not-Present", "#NP", 11, _errorCode)
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{}
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};
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class StackFault : public X86Fault
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{
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public:
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StackFault(uint32_t _errorCode) :
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X86Fault("Stack", "#SS", 12, _errorCode)
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{}
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};
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class GeneralProtection : public X86Fault
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{
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public:
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GeneralProtection(uint32_t _errorCode) :
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X86Fault("General-Protection", "#GP", 13, _errorCode)
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{}
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};
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class PageFault : public X86Fault
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{
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protected:
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BitUnion32(PageFaultErrorCode)
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Bitfield<0> present;
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Bitfield<1> write;
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Bitfield<2> user;
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Bitfield<3> reserved;
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Bitfield<4> fetch;
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EndBitUnion(PageFaultErrorCode)
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Addr addr;
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public:
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PageFault(Addr _addr, uint32_t _errorCode) :
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X86Fault("Page-Fault", "#PF", 14, _errorCode), addr(_addr)
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{}
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PageFault(Addr _addr, bool present, BaseTLB::Mode mode,
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bool user, bool reserved) :
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X86Fault("Page-Fault", "#PF", 14, 0), addr(_addr)
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{
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PageFaultErrorCode code = 0;
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code.present = present;
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code.write = (mode == BaseTLB::Write);
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code.user = user;
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code.reserved = reserved;
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code.fetch = (mode == BaseTLB::Execute);
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errorCode = code;
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}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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virtual std::string describe() const;
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};
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class X87FpExceptionPending : public X86Fault
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{
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public:
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X87FpExceptionPending() :
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X86Fault("x87 Floating-Point Exception Pending", "#MF", 16)
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{}
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};
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class AlignmentCheck : public X86Fault
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{
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public:
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AlignmentCheck() :
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X86Fault("Alignment-Check", "#AC", 17, 0)
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{}
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};
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class MachineCheck : public X86Abort
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{
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public:
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MachineCheck() :
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X86Abort("Machine-Check", "#MC", 18)
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{}
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};
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class SIMDFloatingPointFault : public X86Fault
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{
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public:
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SIMDFloatingPointFault() :
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X86Fault("SIMD Floating-Point", "#XF", 19)
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{}
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};
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class SecurityException : public X86FaultBase
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{
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public:
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SecurityException() :
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X86FaultBase("Security Exception", "#SX", 30)
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{}
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};
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class ExternalInterrupt : public X86Interrupt
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{
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public:
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ExternalInterrupt(uint8_t _vector) :
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X86Interrupt("External Interrupt", "#INTR", _vector)
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{}
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};
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class SystemManagementInterrupt : public X86Interrupt
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{
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public:
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SystemManagementInterrupt() :
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X86Interrupt("System Management Interrupt", "#SMI", 0)
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{}
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};
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class InitInterrupt : public X86Interrupt
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{
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public:
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InitInterrupt(uint8_t _vector) :
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X86Interrupt("INIT Interrupt", "#INIT", _vector)
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{}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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};
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class StartupInterrupt : public X86Interrupt
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{
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public:
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StartupInterrupt(uint8_t _vector) :
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X86Interrupt("Startup Interrupt", "#SIPI", _vector)
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{}
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void invoke(ThreadContext * tc,
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StaticInstPtr inst = StaticInst::nullStaticInstPtr);
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};
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class SoftwareInterrupt : public X86Interrupt
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{
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public:
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SoftwareInterrupt(uint8_t _vector) :
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X86Interrupt("Software Interrupt", "#INTR", _vector)
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{}
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bool isSoft()
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{
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return true;
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}
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};
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}
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#endif // __ARCH_X86_FAULTS_HH__
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