gem5/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
Andreas Hansson 74553c7d3f stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.
2013-05-30 12:54:18 -04:00

61 lines
6.4 KiB
Text

---------- Begin Simulation Statistics ----------
sim_seconds 0.008665 # Number of seconds simulated
sim_ticks 8664886 # Number of ticks simulated
final_tick 8664886 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 321644 # Simulator tick rate (ticks/s)
host_mem_usage 252216 # Number of bytes of host memory used
host_seconds 26.94 # Real time elapsed on the host
system.funcbus.throughput 0 # Throughput (bytes/s)
system.funcbus.data_through_bus 0 # Total data (bytes)
system.ruby.l1_cntrl4.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl4.cacheMemory.demand_misses 77331 # Number of cache demand misses
system.ruby.l1_cntrl4.cacheMemory.demand_accesses 77331 # Number of cache demand accesses
system.ruby.l1_cntrl5.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl5.cacheMemory.demand_misses 77389 # Number of cache demand misses
system.ruby.l1_cntrl5.cacheMemory.demand_accesses 77389 # Number of cache demand accesses
system.ruby.l1_cntrl6.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl6.cacheMemory.demand_misses 77354 # Number of cache demand misses
system.ruby.l1_cntrl6.cacheMemory.demand_accesses 77354 # Number of cache demand accesses
system.ruby.l1_cntrl7.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl7.cacheMemory.demand_misses 77281 # Number of cache demand misses
system.ruby.l1_cntrl7.cacheMemory.demand_accesses 77281 # Number of cache demand accesses
system.ruby.l1_cntrl0.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl0.cacheMemory.demand_misses 77377 # Number of cache demand misses
system.ruby.l1_cntrl0.cacheMemory.demand_accesses 77377 # Number of cache demand accesses
system.ruby.l1_cntrl1.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl1.cacheMemory.demand_misses 77193 # Number of cache demand misses
system.ruby.l1_cntrl1.cacheMemory.demand_accesses 77193 # Number of cache demand accesses
system.ruby.l1_cntrl2.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl2.cacheMemory.demand_misses 76824 # Number of cache demand misses
system.ruby.l1_cntrl2.cacheMemory.demand_accesses 76824 # Number of cache demand accesses
system.ruby.l1_cntrl3.cacheMemory.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl3.cacheMemory.demand_misses 76825 # Number of cache demand misses
system.ruby.l1_cntrl3.cacheMemory.demand_accesses 76825 # Number of cache demand accesses
system.cpu0.num_reads 99885 # number of read accesses completed
system.cpu0.num_writes 54375 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99537 # number of read accesses completed
system.cpu1.num_writes 53839 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 99297 # number of read accesses completed
system.cpu2.num_writes 53929 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99124 # number of read accesses completed
system.cpu3.num_writes 54072 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99259 # number of read accesses completed
system.cpu4.num_writes 54427 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99389 # number of read accesses completed
system.cpu5.num_writes 54074 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 99658 # number of read accesses completed
system.cpu6.num_writes 54033 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 100000 # number of read accesses completed
system.cpu7.num_writes 53796 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
---------- End Simulation Statistics ----------