gem5/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
Andreas Hansson 74553c7d3f stats: Update the stats to reflect bus and memory changes
This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.
2013-05-30 12:54:18 -04:00

88 lines
9.3 KiB
Text

---------- Begin Simulation Statistics ----------
sim_seconds 0.007481 # Number of seconds simulated
sim_ticks 7481441 # Number of ticks simulated
final_tick 7481441 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
host_tick_rate 59106 # Simulator tick rate (ticks/s)
host_mem_usage 252804 # Number of bytes of host memory used
host_seconds 126.58 # Real time elapsed on the host
system.funcbus.throughput 0 # Throughput (bytes/s)
system.funcbus.data_through_bus 0 # Total data (bytes)
system.ruby.l1_cntrl4.L1Dcache.demand_hits 21 # Number of cache demand hits
system.ruby.l1_cntrl4.L1Dcache.demand_misses 77428 # Number of cache demand misses
system.ruby.l1_cntrl4.L1Dcache.demand_accesses 77449 # Number of cache demand accesses
system.ruby.l1_cntrl4.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl4.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl4.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl5.L1Dcache.demand_hits 25 # Number of cache demand hits
system.ruby.l1_cntrl5.L1Dcache.demand_misses 77511 # Number of cache demand misses
system.ruby.l1_cntrl5.L1Dcache.demand_accesses 77536 # Number of cache demand accesses
system.ruby.l1_cntrl5.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl5.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl5.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl6.L1Dcache.demand_hits 21 # Number of cache demand hits
system.ruby.l1_cntrl6.L1Dcache.demand_misses 77666 # Number of cache demand misses
system.ruby.l1_cntrl6.L1Dcache.demand_accesses 77687 # Number of cache demand accesses
system.ruby.l1_cntrl6.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl6.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl6.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl7.L1Dcache.demand_hits 23 # Number of cache demand hits
system.ruby.l1_cntrl7.L1Dcache.demand_misses 77528 # Number of cache demand misses
system.ruby.l1_cntrl7.L1Dcache.demand_accesses 77551 # Number of cache demand accesses
system.ruby.l1_cntrl7.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl7.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl7.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl0.L1Dcache.demand_hits 27 # Number of cache demand hits
system.ruby.l1_cntrl0.L1Dcache.demand_misses 77272 # Number of cache demand misses
system.ruby.l1_cntrl0.L1Dcache.demand_accesses 77299 # Number of cache demand accesses
system.ruby.l1_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl0.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl0.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl1.L1Dcache.demand_hits 30 # Number of cache demand hits
system.ruby.l1_cntrl1.L1Dcache.demand_misses 77679 # Number of cache demand misses
system.ruby.l1_cntrl1.L1Dcache.demand_accesses 77709 # Number of cache demand accesses
system.ruby.l1_cntrl1.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl1.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl1.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl2.L1Dcache.demand_hits 14 # Number of cache demand hits
system.ruby.l1_cntrl2.L1Dcache.demand_misses 77082 # Number of cache demand misses
system.ruby.l1_cntrl2.L1Dcache.demand_accesses 77096 # Number of cache demand accesses
system.ruby.l1_cntrl2.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl2.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl2.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l1_cntrl3.L1Dcache.demand_hits 31 # Number of cache demand hits
system.ruby.l1_cntrl3.L1Dcache.demand_misses 77329 # Number of cache demand misses
system.ruby.l1_cntrl3.L1Dcache.demand_accesses 77360 # Number of cache demand accesses
system.ruby.l1_cntrl3.L1Icache.demand_hits 0 # Number of cache demand hits
system.ruby.l1_cntrl3.L1Icache.demand_misses 0 # Number of cache demand misses
system.ruby.l1_cntrl3.L1Icache.demand_accesses 0 # Number of cache demand accesses
system.ruby.l2_cntrl0.L2cache.demand_hits 5922 # Number of cache demand hits
system.ruby.l2_cntrl0.L2cache.demand_misses 613572 # Number of cache demand misses
system.ruby.l2_cntrl0.L2cache.demand_accesses 619494 # Number of cache demand accesses
system.cpu0.num_reads 99553 # number of read accesses completed
system.cpu0.num_writes 54274 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
system.cpu1.num_reads 99453 # number of read accesses completed
system.cpu1.num_writes 54478 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
system.cpu2.num_reads 98747 # number of read accesses completed
system.cpu2.num_writes 53976 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
system.cpu3.num_reads 99232 # number of read accesses completed
system.cpu3.num_writes 54121 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 99563 # number of read accesses completed
system.cpu4.num_writes 53960 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu5.num_reads 99501 # number of read accesses completed
system.cpu5.num_writes 54015 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
system.cpu6.num_reads 100000 # number of read accesses completed
system.cpu6.num_writes 54332 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
system.cpu7.num_reads 99277 # number of read accesses completed
system.cpu7.num_writes 53851 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
---------- End Simulation Statistics ----------