gem5/src
Ron Dreslinski 6ffdc7b4d7 Another memleak in the memtester (need [] with the delete)
src/cpu/memtest/memtest.cc:
    Another memleak in the memtester

--HG--
extra : convert_revision : f7ab079e90d578fb6b9d1ff238d049fcce55b01b
2006-10-12 13:45:28 -04:00
..
arch Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) 2006-10-08 10:53:24 -07:00
base Fix problems with unCacheable addresses in timing-coherence 2006-10-12 13:33:21 -04:00
cpu Another memleak in the memtester (need [] with the delete) 2006-10-12 13:45:28 -04:00
dev post checkpoint restoration the bus ranges need to be re-initialized for ALL pci devs, not just ide. 2006-10-08 23:18:19 -04:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern Allocate new thread stacks and shared mem region via Process page table 2006-10-08 04:29:40 -04:00
mem Fix problems with unCacheable addresses in timing-coherence 2006-10-12 13:33:21 -04:00
python More cache fixes. Atomic coherence now works as well. 2006-10-11 18:28:33 -04:00
sim Merge zizzer:/bk/newmem 2006-10-06 21:46:04 -04:00
unittest Merge iceaxe.:/Volumes/work/research/m5/head 2006-06-11 22:01:34 -04:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript Two minor fixes. 2006-10-10 01:49:46 -04:00