gem5/src/arch/sparc/isa
Gabe Black 6aa06a26b7 Changes to the isa_parser and affected files to fix an indexing problem with split execute instructions and miscregs aliasing with integer registers.
src/arch/isa_parser.py:
    Rearranged things so that classes with more than one execute function treat operands properly.
    1. Eliminated the CodeBlock class
    2. Created a SubOperandList
    3. Redefined how InstObjParams is constructed

    To define an InstObjParam, you can either pass in a single code literal which will be named "code", or you can pass in a dictionary of code snippets which will be substituted into the Templates. In order to get this to work, there is a new restriction that each template has only one function in it. These changes should only affect memory instructions which have regular and split execute functions.

    Also changed the MiscRegs so that they use the instrunctions srcReg and destReg arrays.
src/arch/sparc/isa/formats/basic.isa:
src/arch/sparc/isa/formats/branch.isa:
src/arch/sparc/isa/formats/integerop.isa:
src/arch/sparc/isa/formats/mem/basicmem.isa:
src/arch/sparc/isa/formats/mem/blockmem.isa:
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa/formats/nop.isa:
src/arch/sparc/isa/formats/priv.isa:
src/arch/sparc/isa/formats/trap.isa:
    Rearranged to work with new InstObjParam scheme.
src/cpu/o3/sparc/dyn_inst.hh:
    Added functions to access the miscregs using the indexes from instructions srcReg and destReg arrays. Also changed the names of the other accessors so that they have the suffix "Operand" if they use those arrays.
src/cpu/simple/base.hh:
    Added functions to access the miscregs using the indexes from instructions srcReg and destReg arrays.

--HG--
extra : convert_revision : c91e1073138b72bcf4113a721e0ed40ec600cf2e
2006-12-16 07:10:04 -05:00
..
formats Changes to the isa_parser and affected files to fix an indexing problem with split execute instructions and miscregs aliasing with integer registers. 2006-12-16 07:10:04 -05:00
base.isa Fixes to the isa description. 2006-11-23 00:36:42 -05:00
bitfields.isa Fixed the bitfield FCN to include the right bits. 2006-10-25 17:50:39 -04:00
decoder.isa Some basic fix ups, and CWP is no longer set explicitly. 2006-12-06 05:43:25 -05:00
includes.isa Reorganize the includes and add an include for misc.hh. 2006-12-06 05:45:18 -05:00
main.isa Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description. 2006-10-23 07:55:52 -04:00
operands.isa Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed. 2006-12-05 01:55:02 -05:00