Ali Saidi 68495a0748 ARM: Fix an issue with clang generating wrong code. ... Clang generated executables would enter the if condition when it wasn't supposted to, resulting in the wrong simulated behavior. Implementing the operation this way is a bit faster anyway.		2013-02-15 17:40:08 -05:00
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arch	ARM: Fix an issue with clang generating wrong code.	2013-02-15 17:40:08 -05:00
base	ruby: replace Time with Cycles in Message class	2013-02-10 21:26:24 -06:00
cpu	cpu: fix case with o3 cpu blocking and unblocking decode in cycle	2013-02-15 17:40:08 -05:00
dev	dev: Fix infinite recursion in DMA devices	2013-01-07 16:56:39 -05:00
doc	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
kern	base: Encapsulate the underlying fields in AddrRange	2013-01-07 13:05:38 -05:00
mem	Ruby: Fix compilation errors on gcc 4.7 and clang 3.2	2013-02-14 12:24:51 -05:00
proto	scons: Address clang 3.2 compilation error	2013-01-14 10:23:56 -05:00
python	base: Add support for newer versions of IPython	2013-02-10 13:23:58 +01:00
sim	sim: remove unused struct priority_compare	2013-01-31 21:26:29 -06:00
unittest	AddrRange: Transition from Range<T> to AddrRange	2012-09-19 06:15:44 -04:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	scons: Remove stale compiler options	2013-01-07 13:05:39 -05:00