gem5/src
Lisa Hsu 67c20dd9dd Merge zizzer:/bk/newmem
into  zed.eecs.umich.edu:/z/hsul/work/m5/newmem

--HG--
extra : convert_revision : a0775bf59ff7049b76917b1ab551bc28efd56b3d
2006-10-08 23:19:03 -04:00
..
arch Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) 2006-10-08 10:53:24 -07:00
base Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing) 2006-10-08 10:53:24 -07:00
cpu add in serialization of AtomicSimpleCPU _status. This is needed because right now unserializing breaks an assert since CPU status is not saved. Kev says that this will break uniform serialization across CPUs since each type of CPU has its own "status" enum set. So, the repercussions are that if you serialize in this CPU, you must first unserialize in this CPU before switching to something else you want. 2006-10-08 23:16:40 -04:00
dev post checkpoint restoration the bus ranges need to be re-initialized for ALL pci devs, not just ide. 2006-10-08 23:18:19 -04:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern Allocate new thread stacks and shared mem region via Process page table 2006-10-08 04:29:40 -04:00
mem Only respond if the pkt needs a response. 2006-10-08 19:05:48 -04:00
python Fixes for Port proxies and proxy parameters. 2006-10-08 18:26:59 -07:00
sim Merge zizzer:/bk/newmem 2006-10-06 21:46:04 -04:00
unittest Merge iceaxe.:/Volumes/work/research/m5/head 2006-06-11 22:01:34 -04:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript add boiler plate intel nic code 2006-09-18 20:12:45 -04:00