gem5/src/arch
Andreas Sandberg 66a1016a35 arm, kvm: Override the kernel's default MPIDR value
The kernel and gem5 derive MPIDR values from CPU IDs in slightly
different ways. This means that guests running in a multi-CPU setup
sometimes fail to bring up secondary CPUs. Fix this by overriding the
MPIDR value in virtual CPUs just after they have been instantiated.

Change-Id: I916d44978a9c855ab89c80a083af45b0cea6edac
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2461
Reviewed-by: Weiping Liao <weipingliao@google.com>
2017-04-03 16:37:55 +00:00
..
alpha syscall-emul: Move memState into its own file 2017-03-09 19:19:38 +00:00
arm arm, kvm: Override the kernel's default MPIDR value 2017-04-03 16:37:55 +00:00
generic syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations 2017-02-27 14:10:15 -05:00
hsail gpu-compute: remove unnecessary member from class 2017-02-27 13:18:51 -05:00
mips syscall-emul: Move memState into its own file 2017-03-09 19:19:38 +00:00
null cpu,isa,mem: Add per-thread wakeup logic 2015-09-30 11:14:19 -05:00
power syscall-emul: Move memState into its own file 2017-03-09 19:19:38 +00:00
riscv syscall-emul: Rewrite system call exit code 2017-03-09 22:42:45 +00:00
sparc syscall-emul: Move memState into its own file 2017-03-09 19:19:38 +00:00
x86 syscall-emul: Ignore unimplemented system calls 2017-03-09 22:42:45 +00:00
isa_parser.py arch: Include generated decoder header after normal headers 2017-02-27 12:06:00 +00:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF 2016-10-26 22:47:38 -04:00