gem5/tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout
Steve Reinhardt 62c08a75ad Make default PhysicalMemory latency slightly more realistic.
Also update stats to reflect change.
2008-08-03 18:13:29 -04:00

27 lines
768 B
Plaintext

M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Aug 2 2008 17:21:13
M5 started Sat Aug 2 17:29:40 2008
M5 executing on zizzer
M5 revision 5517:3ad997252dd241f919fe7d9071a0a136e29ac424
M5 commit date Thu Jul 31 08:01:38 2008 -0700
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/o3-timing tests/run.py quick/02.insttest/sparc/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
Begining test of difficult SPARC instructions...
LDSTUB: Passed
SWAP: Passed
CAS FAIL: Passed
CAS WORK: Passed
CASX FAIL: Passed
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
STTW: Passed
Done
Exiting @ tick 27756500 because target called exit()