gem5/configs/common
Nilay Vaish 62425b7a07 Simulation.py: move code related to checkpointing to functions
This patch moves the code related to checkpointing from the run() function to
several different functions. The aim is to make the code more manageable. No
functionality changes are expected, but since the code is kind of unruly, it
is possible that some change might have creeped in.
2012-08-06 18:14:32 -05:00
..
Benchmarks.py configs: add run scripts for ics/gb versions of android and bbench 2012-06-11 11:07:42 -04:00
CacheConfig.py Bus: Split the bus into a non-coherent and coherent bus 2012-05-31 13:30:04 -04:00
Caches.py O3: Remove hardcoded tgts_per_mshr in O3CPU.py. 2011-12-01 00:15:22 -08:00
cpu2000.py cpu2000: Add missing art benchmark to all 2012-01-09 18:08:20 -06:00
FSConfig.py Config: Remove setMipsOptions 2012-06-07 08:05:30 -05:00
O3_ARM_v7a.py prefetcher: Make prefetcher a sim object instead of it being a parameter on cache 2012-02-12 16:07:38 -06:00
Options.py Config: Fix help msg for option --mem-size 2012-05-03 05:17:29 -05:00
Simulation.py Simulation.py: move code related to checkpointing to functions 2012-08-06 18:14:32 -05:00
SysPaths.py make rcS files read from the m5 source directory, not /dist. 2006-11-08 14:10:25 -05:00