5cfc5e8080
================================================= -every MIPS32 ISA is represented with some type of code block. -any instruction that doesnt have a code block would be of format WarnUnimpl. Examples of the ones I am waiting on further info to implement are the TLB register insts, memory consistency instructions (ll,sc,etc.) and software debug insts. --HG-- extra : convert_revision : 4a26c72e4fa1f63b8689fe2631a7508daf660969 |
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isa | ||
isa_traits.cc | ||
isa_traits.hh |