gem5/src/arch/sparc/isa/includes.isa
Ali Saidi 592f35ac0f fix mostly floating point related
src/arch/sparc/floatregfile.cc:
    fix fp read/writing to registers... looking for suggestions on cleaner ways if anyone has them
src/arch/sparc/isa/decoder.isa:
    fix some fp implementations
src/arch/sparc/isa/formats/basic.isa:
    add new fp op class that 0 cexec in fsr and sets rounding mode for the up comming op
src/arch/sparc/isa/includes.isa:
    include the appropriate header files for the rounding code
src/arch/sparc/miscregfile.cc:
    print fsr out when it's read/written and the Sparc traceflgas in on
src/cpu/exetrace.cc:
    fix printing of float registers

--HG--
extra : convert_revision : 49faab27f2e786a8455f9ca0f3f0132380c9d992
2007-02-02 18:04:42 -05:00

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// Copyright (c) 2006-2007 The Regents of The University of Michigan
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution;
// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Ali Saidi
// Gabe Black
// Steve Reinhardt
////////////////////////////////////////////////////////////////////
//
// Output include file directives.
//
output header {{
#include <cstring>
#include <sstream>
#include <iostream>
#include "arch/sparc/faults.hh"
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/regfile.hh"
#include "base/misc.hh"
#include "cpu/static_inst.hh"
#include "mem/packet.hh"
#include "mem/request.hh" // some constructors use MemReq flags
}};
output decoder {{
#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh" // for Jump::branchTarget()
#include "mem/packet.hh"
#if defined(linux) || defined(__APPLE__)
#include <fenv.h>
#endif
#include <algorithm>
using namespace SparcISA;
}};
output exec {{
#if defined(linux) || defined(__APPLE__)
#include <fenv.h>
#endif
#if defined(__sun) || defined (__OpenBSD__)
#include <ieeefp.h>
#endif
#include <limits>
#include <cmath>
#include "arch/sparc/asi.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "sim/sim_exit.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
using namespace SparcISA;
using namespace std;
}};