gem5/arch
Korey Sewell 57d53f8a9d Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem

--HG--
extra : convert_revision : b101fa550567d5a9f5de6c2d8c3f67829ae050c1
2006-03-12 05:58:28 -05:00
..
alpha Merge zizzer:/bk/newmem 2006-03-12 05:58:28 -05:00
mips MIPS is back to compiling and building now! 2006-03-12 05:57:34 -05:00
sparc fix merging issues 2006-03-09 16:17:10 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Work towards factoring isa_traits.hh into smaller, more specialized files. 2006-03-10 19:11:27 -05:00