55e3b9f743
remove unused code
console/Makefile:
cleanup Makefile. Remove unneeded -D options
console/console.c:
Major cleanup and formatting
remove unused #ifdef code
remove unused #includes
rename xxm -> m5
rename simos -> m5
console/dbmentry.S:
console/paljtokern.S:
console/paljtoslave.S:
console/printf.c:
Major cleanup and formatting
remove unused #ifdef code
remove unused #includes
rename __start -> _start to get rid of warning.
h/cserve.h:
h/dc21164FromGasSources.h:
h/ev5_alpha_defs.h:
h/ev5_defs.h:
h/ev5_osfalpha_defs.h:
h/ev5_paldef.h:
h/fromHudsonMacros.h:
h/fromHudsonOsf.h:
h/rpb.h:
Major cleanup and formatting
h/ev5_impure.h:
Major cleanup and formatting
remove unused #ifdef code
palcode/Makefile:
cleanup Makefile
remove unused -D options
unify platform_tlaser.S and platform_tsunami.S into platform.S and
generate multiple .o files using various #defines
unify osfpal.S osfpal_cache_copy.S and osfpal_cache_copy_unaligned.S into
osfpal.S and generate multiple .o files using various #defines
palcode/osfpal.S:
Major cleanup and formatting
remove unused #defines
remove unused #if code
merge copy code into this file.
palcode/platform.S:
Major cleanup and formatting
remove unused #defines
remove unused #if code
merge platform code into this file.
200 lines
6 KiB
ArmAsm
200 lines
6 KiB
ArmAsm
/*
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* Copyright (c) 2003, 2004
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* The Regents of The University of Michigan
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* All Rights Reserved
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*
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* This code is part of the M5 simulator, developed by Nathan Binkert,
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* Erik Hallnor, Steve Raasch, and Steve Reinhardt, with contributions
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* from Ron Dreslinski, Dave Greene, Lisa Hsu, Ali Saidi, and Andrew
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* Schultz.
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*
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* Permission is granted to use, copy, create derivative works and
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* redistribute this software and such derivative works for any purpose,
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* so long as the copyright notice above, this grant of permission, and
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* the disclaimer below appear in all copies made; and so long as the
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* name of The University of Michigan is not used in any advertising or
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* publicity pertaining to the use or distribution of this software
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* without specific, written prior authorization.
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*
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* THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
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* UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
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* WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
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* IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
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* THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
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* INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
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* DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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*/
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/*
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* Copyright 1993 Hewlett-Packard Development Company, L.P.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "dc21164FromGasSources.h" // DECchip 21164 specific definitions
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#include "ev5_defs.h"
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#include "fromHudsonOsf.h" // OSF/1 specific definitions
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#include "fromHudsonMacros.h" // Global macro definitions
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/* Jump to kernel
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* args:
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* Kernel address - a0
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* PCBB - a1
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* First free PFN - a3?
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*
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* Enable kseg addressing in ICSR
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* Enable kseg addressing in MCSR
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* Set VTBR -- Set to 1GB as per SRM, or maybe 8GB??
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* Set PCBB -- pass pointer in arg
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* Set PTBR -- get it out of PCB
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* Set KSP -- get it out of PCB
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*
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* Jump to kernel address
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*
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* Kernel args-
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* s0 first free PFN
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* s1 ptbr
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* s2 argc 0
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* s3 argv NULL
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* s5 osf_param (sysconfigtab) NULL
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*/
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.global palJToKern
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.text 3
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palJToKern:
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ALIGN_BRANCH
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ldq_p a0, 0(zero)
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ldq_p a1, 8(zero)
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ldq_p a3, 16(zero)
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/* Point the Vptbr at 8GB */
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lda t0, 0x1(zero)
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sll t0, 33, t0
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mtpr t0, mVptBr // Load Mbox copy
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mtpr t0, iVptBr // Load Ibox copy
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STALL // don't dual issue the load with mtpr -pb
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/* Turn on superpage mapping in the mbox and icsr */
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lda t0, (2<<MCSR_V_SP)(zero) // Get a '10' (binary) in MCSR<SP>
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STALL // don't dual issue the load with mtpr -pb
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mtpr t0, mcsr // Set the super page mode enable bit
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STALL // don't dual issue the load with mtpr -pb
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lda t0, 0(zero)
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mtpr t0, dtbAsn
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mtpr t0, itbAsn
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LDLI (t1,0x20000000)
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STALL // don't dual issue the load with mtpr -pb
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mfpr t0, icsr // Enable superpage mapping
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STALL // don't dual issue the load with mtpr -pb
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bis t0, t1, t0
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mtpr t0, icsr
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STALL // Required stall to update chip ...
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STALL
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STALL
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STALL
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STALL
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ldq_p s0, PCB_Q_PTBR(a1)
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sll s0, VA_S_OFF, s0 // Shift PTBR into position
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STALL // don't dual issue the load with mtpr -pb
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mtpr s0, ptPtbr // PHYSICAL MBOX INST -> MT PT20 IN 0,1
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STALL // don't dual issue the load with mtpr -pb
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ldq_p sp, PCB_Q_KSP(a1)
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mtpr a0, excAddr // Load the dispatch address.
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STALL // don't dual issue the load with mtpr -pb
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bis a3, zero, a0 // first free PFN
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ldq_p a1, PCB_Q_PTBR(a1) // ptbr
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ldq_p a2, 24(zero) // argc
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ldq_p a3, 32(zero) // argv
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ldq_p a4, 40(zero) // environ
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lda a5, 0(zero) // osf_param
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STALL // don't dual issue the load with mtpr -pb
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mtpr zero, dtbIa // Flush all D-stream TB entries
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mtpr zero, itbIa // Flush all I-stream TB entries
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br zero, 2f
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ALIGN_BLOCK
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2: NOP
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mtpr zero, icFlush // Flush the icache.
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NOP
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NOP
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NOP // Required NOPs ... 1-10
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP // Required NOPs ... 11-20
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP // Required NOPs ... 21-30
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP // Required NOPs ... 31-40
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP
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NOP // Required NOPs ... 41-44
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NOP
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NOP
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NOP
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hw_rei_stall // Dispatch to kernel
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