gem5/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini
Steve Reinhardt 0f8b5afd7a tests: update reference config.ini files for previous cset
Rename 'responder_set' to 'use_default_range'.
2010-08-17 05:06:22 -07:00

206 lines
3.5 KiB
INI

[root]
type=Root
children=system
dummy=0
[system]
type=System
children=cpu0 cpu1 cpu2 cpu3 membus physmem
mem_mode=timing
physmem=system.physmem
[system.cpu0]
type=TimingSimpleCPU
children=dtb itb tracer workload
checker=Null
clock=500
cpu_id=0
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu0.dtb
function_trace=false
function_trace_start=0
itb=system.cpu0.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu0.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[1]
icache_port=system.membus.port[0]
[system.cpu0.dtb]
type=SparcTLB
size=64
[system.cpu0.itb]
type=SparcTLB
size=64
[system.cpu0.tracer]
type=ExeTracer
[system.cpu0.workload]
type=LiveProcess
cmd=test_atomic 4
cwd=
egid=100
env=
errout=cerr
euid=100
executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
gid=100
input=cin
max_stack_size=67108864
output=cout
pid=100
ppid=99
simpoint=0
system=system
uid=100
[system.cpu1]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=1
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu1.dtb
function_trace=false
function_trace_start=0
itb=system.cpu1.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu1.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[3]
icache_port=system.membus.port[2]
[system.cpu1.dtb]
type=SparcTLB
size=64
[system.cpu1.itb]
type=SparcTLB
size=64
[system.cpu1.tracer]
type=ExeTracer
[system.cpu2]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=2
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu2.dtb
function_trace=false
function_trace_start=0
itb=system.cpu2.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu2.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[5]
icache_port=system.membus.port[4]
[system.cpu2.dtb]
type=SparcTLB
size=64
[system.cpu2.itb]
type=SparcTLB
size=64
[system.cpu2.tracer]
type=ExeTracer
[system.cpu3]
type=TimingSimpleCPU
children=dtb itb tracer
checker=Null
clock=500
cpu_id=3
defer_registration=false
do_checkpoint_insts=true
do_statistics_insts=true
dtb=system.cpu3.dtb
function_trace=false
function_trace_start=0
itb=system.cpu3.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
phase=0
progress_interval=0
system=system
tracer=system.cpu3.tracer
workload=system.cpu0.workload
dcache_port=system.membus.port[7]
icache_port=system.membus.port[6]
[system.cpu3.dtb]
type=SparcTLB
size=64
[system.cpu3.itb]
type=SparcTLB
size=64
[system.cpu3.tracer]
type=ExeTracer
[system.membus]
type=Bus
block_size=64
bus_id=0
clock=1000
header_cycles=1
use_default_range=false
width=64
port=system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port system.cpu2.icache_port system.cpu2.dcache_port system.cpu3.icache_port system.cpu3.dcache_port system.physmem.port[0]
[system.physmem]
type=RubyMemory
clock=1
config_file=
config_options=
debug=false
debug_file=
file=
latency=30000
latency_var=0
null=false
num_cpus=4
phase=0
range=0:134217727
stats_file=ruby.stats
zero=false
port=system.membus.port[8]