Curtis Dunham bcea57afc3 config: Add ability to exit simulation after initialization ... When using gem5 as a slave simulator, it will not advance the clock on its own and depends on the master simulator calling simulate(). This new option lets us use the Python scripts to do all the configuration while stopping short of actually simulating anything.		2015-03-23 06:57:38 -04:00
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Benchmarks.py	config: Specify OS type and release on command line	2015-03-19 04:06:14 -04:00
CacheConfig.py	mem: Move crossbar default latencies to subclasses	2015-03-02 04:00:47 -05:00
Caches.py	config: Update script to set cache line size on system	2013-07-18 08:31:19 -04:00
cpu2000.py	arm: Add support for ARMv8 (AArch64 & AArch32)	2014-01-24 15:29:34 -06:00
CpuConfig.py	scons: Do not build the InOrderCPU	2015-01-20 08:12:45 -05:00
FSConfig.py	config: Specify OS type and release on command line	2015-03-19 04:06:14 -04:00
MemConfig.py	config: Add XOR hashing to the DRAM channel interleaving	2015-02-03 14:25:55 -05:00
O3_ARM_v7a.py	cpu: Change writeback modeling for outstanding instructions	2014-09-03 07:42:33 -04:00
Options.py	config: Add ability to exit simulation after initialization	2015-03-23 06:57:38 -04:00
Simulation.py	config: Add ability to exit simulation after initialization	2015-03-23 06:57:38 -04:00
SysPaths.py	config: rename 'file' var	2015-02-05 16:45:12 -08:00