gem5/src/arch
Steve Reinhardt 5200e04e92 arch, x86: add support for arrays as memory operands
Although the cache models support wider accesses, the ISA descriptions
assume that (for the most part) memory operands are integer types,
which makes it difficult to define instructions that do memory accesses
larger than 64 bits.

This patch adds some generic support for memory operands that are arrays
of uint64_t, and specifically a 'u2qw' operand type for x86 that is an
array of 2 uint64_ts (128 bits).  This support is unused at this point,
but will be needed shortly for cmpxchg16b.  Ideally the 128-bit SSE
memory accesses will also be rewritten to use this support.

Support for 128-bit accesses could also have been added using the gcc
__int128_t extension, which would have been less disruptive.  However,
although clang also supports __int128_t, it's still non-standard.
Also, more importantly, this approach creates a path to defining
256- and 512-byte operands as well, which will be useful for eventual
AVX support.
2016-02-06 17:21:20 -08:00
..
alpha style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
arm style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
generic style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
hsail style: eliminate explicit boolean comparisons 2016-02-06 17:21:20 -08:00
mips style: fix missing spaces in control statements 2016-02-06 17:21:19 -08:00
null cpu,isa,mem: Add per-thread wakeup logic 2015-09-30 11:14:19 -05:00
power arch: get rid of dummy var init 2016-02-06 17:21:20 -08:00
sparc style: remove trailing whitespace 2016-02-06 17:21:18 -08:00
x86 arch, x86: add support for arrays as memory operands 2016-02-06 17:21:20 -08:00
isa_parser.py arch, x86: add support for arrays as memory operands 2016-02-06 17:21:20 -08:00
micro_asm.py scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access 2009-09-22 15:24:16 -07:00
micro_asm_test.py Add a second section to make sure the ROM is extended properly. 2007-05-31 22:21:21 +00:00
SConscript gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00