Andreas Hansson 4c92708b48 MEM: Add the PortId type and a corresponding id field to Port ... This patch introduces the PortId type, moves the definition of INVALID_PORT_ID to the Port class, and also gives every port an id to reflect the fact that each element in a vector port has an identifier/index. Previously the bus and Ruby testers (and potentially other users of the vector ports) added the id field in their port subclasses, and now this functionality is always present as it is moved to the base class.		2012-04-25 10:41:23 -04:00
..
arch	X86: Clear out duplicate TLB entries when adding a new one.	2012-04-24 00:48:41 -07:00
base	clang/gcc: Use STL hash function for int64_t and uint64_t	2012-04-25 08:57:18 -04:00
cpu	MEM: Add the PortId type and a corresponding id field to Port	2012-04-25 10:41:23 -04:00
dev	MEM: Remove the Broadcast destination from the packet	2012-04-14 05:45:55 -04:00
doxygen	Fix up doxygen.	2006-08-14 19:25:07 -04:00
kern	MEM: Introduce the master/slave port sub-classes in C++	2012-03-30 09:40:11 -04:00
mem	MEM: Add the PortId type and a corresponding id field to Port	2012-04-25 10:41:23 -04:00
python	Regression: Add ANSI colours to highlight test status	2012-04-14 05:44:27 -04:00
sim	MEM: Separate snoops and normal memory requests/responses	2012-04-14 05:45:07 -04:00
unittest	sim: A trie data structure specifically to speed up paging lookups.	2012-04-14 23:19:34 -07:00
Doxyfile	Fix up doxygen.	2006-08-14 19:25:07 -04:00
SConscript	clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6	2012-04-14 05:43:31 -04:00