998 lines
No EOL
37 KiB
JSON
998 lines
No EOL
37 KiB
JSON
{
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"name": null,
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"sim_quantum": 0,
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"system": {
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"kernel": "",
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"mmap_using_noreserve": false,
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"kernel_addr_check": true,
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"membus": {
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"slave": {
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"peer": [
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"system.system_port",
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"system.l2c.mem_side"
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],
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"role": "SLAVE"
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},
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"name": "membus",
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"snoop_filter": null,
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"forward_latency": 4,
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"clk_domain": "system.clk_domain",
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"system": "system",
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"width": 16,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.physmem.port"
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],
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"role": "MASTER"
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},
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"response_latency": 2,
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"cxx_class": "CoherentXBar",
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"path": "system.membus",
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"snoop_response_latency": 4,
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"type": "CoherentXBar",
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"use_default_range": false,
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"frontend_latency": 3
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},
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"symbolfile": "",
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"l2c": {
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"is_top_level": false,
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"prefetcher": null,
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"clk_domain": "system.cpu_clk_domain",
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"write_buffers": 8,
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"response_latency": 20,
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"cxx_class": "BaseCache",
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"size": 4194304,
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"tags": {
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"name": "tags",
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"sequential_access": false,
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"assoc": 8,
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"cxx_class": "LRU",
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"path": "system.l2c.tags",
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"type": "LRU",
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"size": 4194304
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},
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"system": "system",
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"mem_side": {
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"peer": "system.membus.slave[1]",
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"role": "MASTER"
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},
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"forward_snoops": true,
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"addr_ranges": [
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"0:18446744073709551615"
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],
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"assoc": 8,
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"path": "system.l2c",
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"name": "l2c",
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"type": "BaseCache",
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"sequential_access": false,
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"cpu_side": {
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"peer": "system.toL2Bus.master[0]",
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"role": "SLAVE"
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},
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"two_queue": false
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},
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"readfile": "",
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"cxx_class": "System",
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"load_offset": 0,
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"work_end_ckpt_count": 0,
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"memories": [
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"system.physmem"
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],
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"work_begin_ckpt_count": 0,
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"clk_domain": {
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"name": "clk_domain",
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"clock": [
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1000
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],
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"voltage_domain": "system.voltage_domain",
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"cxx_class": "SrcClockDomain",
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"path": "system.clk_domain",
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"type": "SrcClockDomain",
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"domain_id": -1
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},
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"mem_ranges": [],
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"eventq_index": 0,
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"dvfs_handler": {
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"enable": false,
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"name": "dvfs_handler",
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"sys_clk_domain": "system.clk_domain",
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"transition_latency": 100000000,
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"cxx_class": "DVFSHandler",
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"domains": [],
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"path": "system.dvfs_handler",
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"type": "DVFSHandler"
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},
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"work_end_exit_count": 0,
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"type": "System",
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"voltage_domain": {
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"name": "voltage_domain",
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"voltage": [
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"1.0"
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],
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"cxx_class": "VoltageDomain",
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"path": "system.voltage_domain",
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"type": "VoltageDomain"
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},
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"cache_line_size": 64,
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"boot_osflags": "a",
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"physmem": {
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"range": "0:134217727",
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"latency": 30000,
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"name": "physmem",
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"clk_domain": "system.clk_domain",
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"latency_var": 0,
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"bandwidth": "73.000000",
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"conf_table_reported": true,
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"cxx_class": "SimpleMemory",
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"path": "system.physmem",
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"null": false,
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"type": "SimpleMemory",
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"port": {
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"peer": "system.membus.master[0]",
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"role": "SLAVE"
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},
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"in_addr_map": true
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},
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"work_cpus_ckpt_count": 0,
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"path": "system",
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"cpu_clk_domain": {
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"name": "cpu_clk_domain",
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"clock": [
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500
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],
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"voltage_domain": "system.voltage_domain",
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"cxx_class": "SrcClockDomain",
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"path": "system.cpu_clk_domain",
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"type": "SrcClockDomain",
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"domain_id": -1
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},
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"toL2Bus": {
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"slave": {
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"peer": [
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"system.cpu0.icache.mem_side",
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"system.cpu0.dcache.mem_side",
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"system.cpu1.icache.mem_side",
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"system.cpu1.dcache.mem_side",
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"system.cpu2.icache.mem_side",
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"system.cpu2.dcache.mem_side",
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"system.cpu3.icache.mem_side",
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"system.cpu3.dcache.mem_side"
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],
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"role": "SLAVE"
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},
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"name": "toL2Bus",
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"snoop_filter": null,
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"clk_domain": "system.cpu_clk_domain",
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"system": "system",
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"width": 32,
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"eventq_index": 0,
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"master": {
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"peer": [
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"system.l2c.cpu_side"
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],
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"role": "MASTER"
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},
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"response_latency": 1,
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"cxx_class": "CoherentXBar",
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"path": "system.toL2Bus",
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"snoop_response_latency": 1,
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"type": "CoherentXBar",
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"use_default_range": false,
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"frontend_latency": 1
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},
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"mem_mode": "atomic",
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"name": "system",
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"init_param": 0,
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"system_port": {
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"peer": "system.membus.slave[0]",
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"role": "MASTER"
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},
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"load_addr_mask": 1099511627775,
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"cpu": [
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{
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"do_statistics_insts": true,
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"name": "itb",
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"path": "system.cpu0.itb",
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"type": "AlphaTLB",
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"size": 48
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},
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"cxx_class": "AtomicSimpleCPU",
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"type": "AtomicSimpleCPU",
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"icache_port": {
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"peer": "system.cpu0.icache.cpu_side",
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"role": "MASTER"
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},
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"icache": {
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"clk_domain": "system.cpu_clk_domain",
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"path": "system.cpu0.icache.tags",
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"size": 32768
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},
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"path": "system.cpu0.icache",
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},
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},
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"interrupts": {
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"path": "system.cpu0.interrupts",
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"type": "AlphaInterrupts",
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"name": "interrupts",
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},
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},
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{
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"errout": "cerr",
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"system": "system",
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"useArchPT": false,
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"file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
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"path": "system.cpu0.workload",
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"input": "None"
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}
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],
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"cxx_class": "LRU",
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"path": "system.cpu0.dcache.tags",
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"size": 32768
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},
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"system": "system",
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},
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"addr_ranges": [
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"0:18446744073709551615"
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],
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"path": "system.cpu0.dcache",
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"name": "dcache",
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"type": "BaseCache",
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"cpu_side": {
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"peer": "system.cpu0.dcache_port",
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"role": "SLAVE"
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},
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"two_queue": false
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},
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"isa": [
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{
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"name": "isa",
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"system": "system",
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"cxx_class": "AlphaISA::ISA",
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"path": "system.cpu0.isa",
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"type": "AlphaISA"
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}
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],
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"tracer": {
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"path": "system.cpu0.tracer",
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"type": "ExeTracer",
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"name": "tracer",
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"cxx_class": "Trace::ExeTracer"
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}
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},
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{
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"itb": {
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"name": "itb",
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"eventq_index": 0,
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"cxx_class": "AlphaISA::TLB",
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"path": "system.cpu1.itb",
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"type": "AlphaTLB",
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"size": 48
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},
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"cxx_class": "AtomicSimpleCPU",
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"system": "system",
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"type": "AtomicSimpleCPU",
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"profile": 0,
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"peer": "system.cpu1.icache.cpu_side",
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"role": "MASTER"
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},
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"clk_domain": "system.cpu_clk_domain",
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"cxx_class": "BaseCache",
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"size": 32768,
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"tags": {
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"name": "tags",
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"path": "system.cpu1.icache.tags",
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"type": "LRU",
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"size": 32768
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},
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"system": "system",
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"peer": "system.toL2Bus.slave[2]",
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"role": "MASTER"
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},
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"0:18446744073709551615"
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],
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"path": "system.cpu1.icache",
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"name": "icache",
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"type": "BaseCache",
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"sequential_access": false,
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"cpu_side": {
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"peer": "system.cpu1.icache_port",
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"role": "SLAVE"
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},
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"two_queue": false
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},
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"interrupts": {
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"path": "system.cpu1.interrupts",
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"type": "AlphaInterrupts",
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"name": "interrupts",
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"cxx_class": "AlphaISA::Interrupts"
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},
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"dcache_port": {
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"peer": "system.cpu1.dcache.cpu_side",
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"role": "MASTER"
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},
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"socket_id": 0,
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"max_insts_all_threads": 0,
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"path": "system.cpu1",
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"max_loads_any_thread": 0,
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"switched_out": false,
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"workload": [
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{
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"name": "workload",
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"output": "cout",
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"chkpt": "",
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"errout": "cerr",
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"kvmInSE": false,
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"system": "system",
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"useArchPT": false,
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"eventq_index": 0,
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"file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
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"cxx_class": "EioProcess",
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"path": "system.cpu1.workload",
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"max_stack_size": 67108864,
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"type": "EioProcess",
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"input": "None"
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|
}
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|
],
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"name": "cpu1",
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"dtb": {
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"name": "dtb",
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} |