Dam Sunwoo b04d6c7c33 arm: change MISCREG_L2ERRSR to warn not fail ... Some newer binaries compiled for Versatile Express TC2 contain access to implementation specific L2MERRSR registers. This causes an infinite loop of undefined exceptions. This patch changes the behavior to "warn not fail" to keep the workloads going.		2014-08-13 06:57:36 -04:00
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arch	arm: change MISCREG_L2ERRSR to warn not fail	2014-08-13 06:57:36 -04:00
base	base: Remove unused M5_PRAGMA_NORETURN	2014-08-13 06:57:27 -04:00
cpu	scons: Build the branch predictor for all CPUs	2014-08-13 06:57:31 -04:00
dev	mips: Remove unused private members to fix compile-time warning	2014-08-13 06:57:30 -04:00
doc	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
kern	kern: get rid of unused linux syscall files	2014-07-18 22:05:51 -07:00
mem	mem: Properly set cache block status fields on writebacks	2014-08-13 06:57:24 -04:00
proto	mem: Edit proto Packet and enhance the python script	2014-03-07 15:56:23 -05:00
python	config: Add hooks to enable new config sys	2014-08-10 05:39:13 -04:00
sim	sim: remove kernel mapping check for baremetal workloads	2014-08-13 06:57:35 -04:00
unittest	unittest: Fix build errors	2014-01-30 12:21:58 -06:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	scons: Silence clang 3.4 warnings on Ubuntu 12.04	2014-08-13 06:57:28 -04:00