19df4e94ee
This will allow it to be specialized by the ISAs. The existing caching scheme is provided by the BasicDecodeCache in the GenericISA namespace and is built from the generalized components. --HG-- rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc
124 lines
4.6 KiB
C++
124 lines
4.6 KiB
C++
/*
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* Copyright (c) 2012 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/arm/decoder.hh"
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#include "arch/arm/isa_traits.hh"
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#include "arch/arm/utility.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Decoder.hh"
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namespace ArmISA
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{
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GenericISA::BasicDecodeCache Decoder::defaultCache;
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void
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Decoder::process()
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{
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// emi is typically ready, with some caveats below...
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instDone = true;
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if (!emi.thumb) {
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emi.instBits = data;
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emi.sevenAndFour = bits(data, 7) && bits(data, 4);
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emi.isMisc = (bits(data, 24, 23) == 0x2 &&
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bits(data, 20) == 0);
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consumeBytes(4);
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DPRINTF(Decoder, "Arm inst: %#x.\n", (uint64_t)emi);
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} else {
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uint16_t word = (data >> (offset * 8));
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if (bigThumb) {
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// A 32 bit thumb inst is half collected.
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emi.instBits = emi.instBits | word;
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bigThumb = false;
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consumeBytes(2);
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DPRINTF(Decoder, "Second half of 32 bit Thumb: %#x.\n",
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emi.instBits);
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} else {
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uint16_t highBits = word & 0xF800;
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if (highBits == 0xE800 || highBits == 0xF000 ||
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highBits == 0xF800) {
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// The start of a 32 bit thumb inst.
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emi.bigThumb = 1;
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if (offset == 0) {
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// We've got the whole thing.
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emi.instBits = (data >> 16) | (data << 16);
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DPRINTF(Decoder, "All of 32 bit Thumb: %#x.\n",
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emi.instBits);
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consumeBytes(4);
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} else {
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// We only have the first half word.
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DPRINTF(Decoder,
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"First half of 32 bit Thumb.\n");
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emi.instBits = (uint32_t)word << 16;
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bigThumb = true;
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consumeBytes(2);
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// emi not ready yet.
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instDone = false;
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}
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} else {
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// A 16 bit thumb inst.
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consumeBytes(2);
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emi.instBits = word;
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// Set the condition code field artificially.
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emi.condCode = COND_UC;
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DPRINTF(Decoder, "16 bit Thumb: %#x.\n",
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emi.instBits);
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if (bits(word, 15, 8) == 0xbf &&
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bits(word, 3, 0) != 0x0) {
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foundIt = true;
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itBits = bits(word, 7, 0);
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DPRINTF(Decoder,
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"IT detected, cond = %#x, mask = %#x\n",
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itBits.cond, itBits.mask);
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}
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}
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}
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}
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}
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//Use this to give data to the decoder. This should be used
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//when there is control flow.
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void
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Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
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{
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data = inst;
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offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
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emi.thumb = pc.thumb();
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FPSCR fpscr = tc->readMiscReg(MISCREG_FPSCR);
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emi.fpscrLen = fpscr.len;
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emi.fpscrStride = fpscr.stride;
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outOfBytes = false;
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process();
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}
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}
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