gem5/arch
Gabe Black 444f520f7e MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly.
arch/alpha/alpha_memory.cc:
cpu/base_dyn_inst.cc:
dev/alpha_console.cc:
dev/pcidev.hh:
dev/sinic.cc:
    MachineCheckFaults are now generated by the ISA, rather than being created directly.

--HG--
extra : convert_revision : 34a7da41639e93be21ed70dac681b27480008d19
2006-02-27 03:57:15 -05:00
..
alpha MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly. 2006-02-27 03:57:15 -05:00
mips Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 2006-02-24 08:52:38 -05:00
sparc Create a Builder object for .isa files in arch/SConscript. 2006-02-23 14:31:15 -05:00
isa_parser.py Enable building only selected CPU models via new scons 2006-02-23 17:00:29 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Enable building only selected CPU models via new scons 2006-02-23 17:00:29 -05:00