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2bit_local_pred.cc
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Merge ktlim@zamp:/z/ktlim2/clean/m5-o3
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2006-06-04 16:07:54 -04:00 |
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2bit_local_pred.hh
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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base_dyn_inst.cc
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O3CPU: Make the instcount debugging stuff per-cpu.
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2008-11-10 11:51:18 -08:00 |
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bpred_unit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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bpred_unit.hh
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o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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2009-04-18 10:42:29 -04:00 |
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bpred_unit_impl.hh
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o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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2009-04-18 10:42:29 -04:00 |
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btb.cc
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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btb.hh
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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checker_builder.cc
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CPU: Make the cpuid parameter get set in SE mode as well.
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2007-10-02 18:33:57 -07:00 |
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comm.hh
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Add support for microcode and pull out the special branch delay slot handling. Branch delay slots need to be squash on a mispredict as well because the nnpc they saw was incorrect.
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2007-04-14 17:13:18 +00:00 |
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commit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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commit.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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commit_impl.hh
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CPA: Add code to automatically record function symbols as CPU executes.
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2009-02-26 19:29:17 -05:00 |
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cpu.cc
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o3, inorder: fix FS bug due to initializing ThreadState to Halted.
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2009-04-17 16:54:58 -07:00 |
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cpu.hh
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tlb: Don't separate the TLB classes into an instruction TLB and a data TLB
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2009-04-08 22:21:27 -07:00 |
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cpu_builder.cc
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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cpu_policy.hh
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gcc: Version 4.3 is pretty anal about shadowing types, placate it.
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2008-09-22 08:25:57 -07:00 |
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decode.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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decode.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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decode_impl.hh
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o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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2009-04-18 10:42:29 -04:00 |
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dep_graph.hh
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Miscellaneous minor fixes.
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2006-06-16 17:15:18 -04:00 |
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dyn_inst.cc
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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dyn_inst.hh
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O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
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2008-10-20 16:22:59 -04:00 |
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dyn_inst_impl.hh
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CPA: Add code to automatically record function symbols as CPU executes.
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2009-02-26 19:29:17 -05:00 |
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fetch.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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fetch.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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fetch_impl.hh
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o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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2009-04-18 10:42:29 -04:00 |
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free_list.cc
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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free_list.hh
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Add comments in code to describe bug conditions.
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2008-02-27 17:50:29 -05:00 |
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fu_pool.cc
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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fu_pool.hh
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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FuncUnitConfig.py
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Move SimObject python files alongside the C++ and fix
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2007-05-27 19:21:17 -07:00 |
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FUPool.py
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Move SimObject python files alongside the C++ and fix
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2007-05-27 19:21:17 -07:00 |
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iew.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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iew.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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iew_impl.hh
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o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode stage was not setting the predicted PC correctly or passing that information back to fetch correctly
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2009-04-18 10:42:29 -04:00 |
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impl.hh
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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inst_queue.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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inst_queue.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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inst_queue_impl.hh
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eventq: convert all usage of events to use the new API.
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2008-10-09 04:58:24 -07:00 |
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isa_specific.hh
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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lsq.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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lsq.hh
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Add in Context IDs to the simulator. From now on, cpuId is almost never used,
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2008-11-02 21:57:07 -05:00 |
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lsq_impl.hh
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Add in Context IDs to the simulator. From now on, cpuId is almost never used,
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2008-11-02 21:57:07 -05:00 |
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lsq_unit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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lsq_unit.hh
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Memory: Rename LOCKED for load locked store conditional to LLSC.
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2009-04-19 04:25:01 -07:00 |
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lsq_unit_impl.hh
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Memory: Rename LOCKED for load locked store conditional to LLSC.
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2009-04-19 04:25:01 -07:00 |
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mem_dep_unit.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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mem_dep_unit.hh
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stats: fix duplicate statistics names.
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2009-03-07 14:30:54 -08:00 |
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mem_dep_unit_impl.hh
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stats: fix duplicate statistics names.
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2009-03-07 14:30:54 -08:00 |
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O3Checker.py
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Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its
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2008-08-18 10:50:58 -07:00 |
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O3CPU.py
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params: Convert the CPU objects to use the auto generated param structs.
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2008-08-11 12:22:16 -07:00 |
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ras.cc
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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ras.hh
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CPU: Prepare CPU models for the new in-order CPU model.
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2009-02-10 15:49:29 -08:00 |
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regfile.hh
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style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
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2008-09-10 14:26:15 -04:00 |
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rename.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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rename.hh
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stats: Fix all stats usages to deal with template fixes
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2009-03-05 19:09:53 -08:00 |
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rename_impl.hh
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params: Convert the CPU objects to use the auto generated param structs.
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2008-08-11 12:22:16 -07:00 |
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rename_map.cc
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Make the floating point zero register special handling only apply for ALPHA.
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2007-04-22 17:50:43 +00:00 |
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rename_map.hh
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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rob.cc
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now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory
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2006-06-30 20:49:31 -04:00 |
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rob.hh
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Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions.
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2007-04-04 15:38:59 -04:00 |
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rob_impl.hh
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Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions.
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2007-04-04 15:38:59 -04:00 |
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sat_counter.cc
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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sat_counter.hh
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Merge ktlim@zizzer:/bk/newmem
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2006-06-02 18:19:50 -04:00 |
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SConscript
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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SConsopts
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Rework the way SCons recurses into subdirectories, making it
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2007-03-10 23:00:54 -08:00 |
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scoreboard.cc
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Make the floating point zero register special handling only apply for ALPHA.
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2007-04-22 17:50:43 +00:00 |
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scoreboard.hh
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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store_set.cc
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Fixes to get new CPU model working for simple test case. The CPU does not yet support retrying accesses.
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2006-06-05 18:14:39 -04:00 |
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store_set.hh
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Cleaned up include files and got rid of many using directives in header files.
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2006-08-15 05:07:15 -04:00 |
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thread_context.cc
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O3: Generaize the O3 IMPL class so it isn't split out by ISA.
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2008-10-09 00:10:02 -07:00 |
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thread_context.hh
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Get rid of the Unallocated thread context state.
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2009-04-15 13:13:47 -07:00 |
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thread_context_impl.hh
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Get rid of the Unallocated thread context state.
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2009-04-15 13:13:47 -07:00 |
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thread_state.hh
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make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
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2008-11-02 21:56:57 -05:00 |
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tournament_pred.cc
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Merge ktlim@zamp:./local/clean/o3-merge/m5
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2006-09-30 23:43:23 -04:00 |
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tournament_pred.hh
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Merge ktlim@zamp:./local/clean/o3-merge/m5
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2006-09-30 23:43:23 -04:00 |
