Palle Lyckegaard 3de9def6c1 sparc: writing to tick_cmpr should not cause a panic ... This register is writable according to UA2005 Tried to boot NetBSD which starts the kernel by writing to the tick_cmpr register. Without the patch gem5 crashes with a panic. With the patch NetBSD starts to boot normally (although sun4v support in NetBSD is not complete yet) Committed by: Nilay Vaish <nilay@cs.wisc.edu>		2015-09-15 08:14:07 -05:00
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alpha	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00
arm	arm, mem: Remove unused CLEAR_LL request flag	2015-08-21 07:03:25 -04:00
generic	sim: Refactor the serialization base class	2015-07-07 09:51:03 +01:00
mips	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00
null	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00
power	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00
sparc	sparc: writing to tick_cmpr should not cause a panic	2015-09-15 08:14:07 -05:00
x86	x86: x86 instruction-implementation bug fixes	2015-07-20 09:15:18 -05:00
isa_parser.py	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00
micro_asm.py	scons: add slicc and ply to sys.path and PYTHONPATH so everyone has access	2009-09-22 15:24:16 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	revert 5af8f40d8f2c	2015-07-28 01:58:04 -05:00