gem5/cpu/full_cpu/op_class.hh
Steve Reinhardt 58c29640b7 Add a new operation class for IPR accesses, and have IPR-accessing
instructions use it (instead of IntALU, as before).  Default config
has a single non-pipelined 3-cycle unit.  A bit conservative for the
ev6 (some are 1, some are 3).

arch/alpha/isa_desc:
    Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
    Add IprAccess.

--HG--
extra : convert_revision : d4103da3343a586936839e29981fd15d6930d442
2005-03-01 00:39:57 -05:00

64 lines
2.7 KiB
C++

/*
* Copyright (c) 2003-2004 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __OP_CLASS_HH__
#define __OP_CLASS_HH__
/**
* @file
* Definition of operation classes.
*/
/**
* Instruction operation classes. These classes are used for
* assigning instructions to functional units.
*/
enum OpClass {
No_OpClass = 0, /* inst does not use a functional unit */
IntAluOp, /* integer ALU */
IntMultOp, /* integer multiplier */
IntDivOp, /* integer divider */
FloatAddOp, /* floating point adder/subtractor */
FloatCmpOp, /* floating point comparator */
FloatCvtOp, /* floating point<->integer converter */
FloatMultOp, /* floating point multiplier */
FloatDivOp, /* floating point divider */
FloatSqrtOp, /* floating point square root */
MemReadOp, /* memory read port */
MemWriteOp, /* memory write port */
IprAccessOp, /* Internal Processor Register read/write port */
InstPrefetchOp, /* instruction prefetch port (on I-cache) */
Num_OpClasses /* total functional unit classes */
};
/**
* Array mapping OpClass enum values to strings. Defined in fu_pool.cc.
*/
extern const char *opClassStrings[];
#endif // __OP_CLASS_HH__