81a735a716
Time to make the ide device work
arch/alpha/system.cc:
write the machine type and rev in the correct place
cpu/simple/cpu.cc:
reset the packet structure every time it's reused... wow the
simple cpu code for talking to memory is getting horrible.
dev/alpha_console.cc:
move the setAlphaAccess to startup() to make sure that the console
binary is loaded
dev/tsunami_cchip.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
fix a couple of bugs injected in the newmem fixes
mem/bus.cc:
More verbose bus tracing
mem/packet.hh:
Add a constructor to packet to set the result to unknown and a reset
method in the case it's being reused
mem/vport.hh:
don't need are own read/write methods since the base functional port
ones call writeBlob readBlob which do the translation for us
--HG--
extra : convert_revision : 8d0e2b782bfbf13dc5c59dab1a79a084d2a7da0a
76 lines
2.9 KiB
C++
76 lines
2.9 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Virtual Port Object Decleration. These ports incorporate some translation
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* into their access methods. Thus you can use one to read and write data
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* to/from virtual addresses.
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*/
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#ifndef __MEM_VPORT_HH__
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#define __MEM_VPORT_HH__
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#include "mem/port.hh"
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#include "config/full_system.hh"
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#include "arch/vtophys.hh"
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/** A class that translates a virtual address to a physical address and then
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* calls the above read/write functions. If an execution context is provided the
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* address can alway be translated, If not it can only be translated if it is a
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* simple address masking operation (such as alpha super page accesses).
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*/
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class VirtualPort : public FunctionalPort
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{
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private:
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ExecContext *xc;
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public:
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VirtualPort(ExecContext *_xc = NULL)
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: xc(_xc)
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{}
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/** Return true if we have an exec context. This is used to prevent someone
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* from accidently deleting the cpus statically allocated vport.
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* @return true if an execution context isn't valid
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*/
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bool nullExecContext() { return xc != NULL; }
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/** Version of readblob that translates virt->phys and deals
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* with page boundries. */
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virtual void readBlob(Addr addr, uint8_t *p, int size);
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/** Version of writeBlob that translates virt->phys and deals
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* with page boundries. */
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virtual void writeBlob(Addr addr, uint8_t *p, int size);
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};
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#endif //__MEM_VPORT_HH__
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