35147170f9
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321 |
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.. | ||
alpha | ||
sparc | ||
baddev.cc | ||
baddev.hh | ||
BadDevice.py | ||
Device.py | ||
disk_image.cc | ||
disk_image.hh | ||
DiskImage.py | ||
etherbus.cc | ||
etherbus.hh | ||
etherdump.cc | ||
etherdump.hh | ||
etherint.cc | ||
etherint.hh | ||
etherlink.cc | ||
etherlink.hh | ||
Ethernet.py | ||
etherpkt.cc | ||
etherpkt.hh | ||
ethertap.cc | ||
ethertap.hh | ||
i8254xGBe.cc | ||
i8254xGBe.hh | ||
i8254xGBe_defs.hh | ||
Ide.py | ||
ide_atareg.h | ||
ide_ctrl.cc | ||
ide_ctrl.hh | ||
ide_disk.cc | ||
ide_disk.hh | ||
ide_wdcreg.h | ||
io_device.cc | ||
io_device.hh | ||
isa_fake.cc | ||
isa_fake.hh | ||
ns_gige.cc | ||
ns_gige.hh | ||
ns_gige_reg.h | ||
Pci.py | ||
pciconfigall.cc | ||
pciconfigall.hh | ||
pcidev.cc | ||
pcidev.hh | ||
pcireg.h | ||
pitreg.h | ||
pktfifo.cc | ||
pktfifo.hh | ||
platform.cc | ||
platform.hh | ||
Platform.py | ||
rtcreg.h | ||
SConscript | ||
simconsole.cc | ||
simconsole.hh | ||
SimConsole.py | ||
simple_disk.cc | ||
simple_disk.hh | ||
SimpleDisk.py | ||
sinic.cc | ||
sinic.hh | ||
sinicreg.hh | ||
uart.cc | ||
uart.hh | ||
Uart.py | ||
uart8250.cc | ||
uart8250.hh |