33ab8f735d
This changeset adds support for m5 pseudo-ops when running in kvm-mode. Unfortunately, we can't trap the normal gem5 co-processor entry in KVM (it doesn't seem to be possible to trap accesses to non-existing co-processors). We therefore use BZJ instructions to cause a trap from virtualized mode into gem5. The BZJ instruction is becomes a normal branch to the gem5 fallback code when running in simulated mode, which means that this patch does not need to change the ARM ISA-specific code. Note: This requires a patched host kernel. |
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.. | ||
jni | ||
jni_gem5Op.c | ||
m5.c | ||
m5op.h | ||
m5op_alpha.S | ||
m5op_arm.S | ||
m5op_sparc.S | ||
m5op_x86.S | ||
m5ops.h | ||
Makefile.alpha | ||
Makefile.arm | ||
Makefile.sparc | ||
Makefile.thumb | ||
Makefile.x86 |