gem5/sim
Ron Dreslinski b6247c9ea7 Add support for multiple ports on the memory. Hook up simple cpu to memory.
Ready to start testing if I could fix the linking errors I can't ever seem to fix.

cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Add connecting of ports until builder can handle it.
mem/physical.cc:
    Add function to allocate a port in the object

    Remove some full_sys stuff untill needed
mem/physical.hh:
    Add function to allocate a port in the object
python/m5/objects/BaseCPU.py:
    Update the params
sim/process.cc:
    Make sure to use the right name (hopefully CPU constructor already called)

--HG--
extra : convert_revision : 4089caf20d7eb53e5463c8ac93ddce5e43ea5d85
2006-02-23 17:02:34 -05:00
..
async.hh Many files: 2005-06-05 05:16:00 -04:00
builder.cc Many files: 2005-06-05 05:16:00 -04:00
builder.hh Many files: 2005-06-05 05:16:00 -04:00
debug.cc Many files: 2005-06-05 05:16:00 -04:00
debug.hh Many files: 2005-06-05 05:16:00 -04:00
eventq.cc Many files: 2005-06-05 05:16:00 -04:00
eventq.hh Many files: 2005-06-05 05:16:00 -04:00
host.hh Many files: 2005-06-05 05:16:00 -04:00
main.cc Many files: 2005-06-05 05:16:00 -04:00
param.cc fixes for gcc 4.0 2005-09-12 03:01:43 -04:00
param.hh Fixes to build with gcc 4.0. 2005-09-02 21:30:02 -04:00
process.cc Add support for multiple ports on the memory. Hook up simple cpu to memory. 2006-02-23 17:02:34 -05:00
process.hh Make loaders use translation port instead of proxy memory. 2006-02-20 23:56:10 -05:00
root.cc Convert type of max_time and progress_interval parameters 2005-09-01 11:32:58 -04:00
serialize.cc fix the MAX_CHECKPOINTS stuff 2005-09-18 21:20:24 -04:00
serialize.hh Many files: 2005-06-05 05:16:00 -04:00
sim_events.cc Move max_time and progress_interval parameters to the Root 2005-06-22 09:59:13 -04:00
sim_events.hh Move max_time and progress_interval parameters to the Root 2005-06-22 09:59:13 -04:00
sim_exit.hh Many files: 2005-06-05 05:16:00 -04:00
sim_object.cc Many files: 2005-06-05 05:16:00 -04:00
sim_object.hh Many files: 2005-06-05 05:16:00 -04:00
startup.cc Many files: 2005-06-05 05:16:00 -04:00
startup.hh Many files: 2005-06-05 05:16:00 -04:00
stat_control.cc Fix bug where simulation terminates same cycle as last stat dump causing a duplicate row in db 2005-11-02 14:45:35 -05:00
stat_control.hh Many files: 2005-06-05 05:16:00 -04:00
stats.hh Many files: 2005-06-05 05:16:00 -04:00
syscall_emul.cc Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port. 2006-02-20 23:26:39 -05:00
syscall_emul.hh Add in a new translating port that allows syscalls to translate addresses via the page table before accessing the memory port. 2006-02-20 23:26:39 -05:00
system.cc More progress toward compiling... partly by 2006-02-15 17:52:49 -05:00
system.hh More progress toward compiling... partly by 2006-02-15 17:52:49 -05:00